| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 720 SETONE, // 0 1 1 0 True if ordered and operands are unequal enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 858 SETONE, // 0 1 1 0 True if ordered and operands are unequal enumerator
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 921 SETONE, // 0 1 1 0 True if ordered and operands are unequal enumerator
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | README.txt | 72 SETONE unimplemented
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| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrFPU.td | 149 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETONE),
153 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETONE),
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 170 case FCmpInst::FCMP_ONE: return ISD::SETONE; in getFCmpCondCode()
187 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 169 case FCmpInst::FCMP_ONE: return ISD::SETONE; in getFCmpCondCode()
186 case ISD::SETONE: case ISD::SETUNE: return ISD::SETNE; in getFCmpCodeWithoutNaN()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 160 case FCmpInst::FCMP_ONE: FOC = ISD::SETNE; FPC = ISD::SETONE; break; in getFCmpCondCode()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 214 case ISD::SETONE: in kill()
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| D | AMDGPUInstructions.td | 204 [{return N->get() == ISD::SETONE || N->get() == ISD::SETNE;}]
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| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 321 case ISD::SETNE: case ISD::SETONE: case ISD::SETUNE: in Select()
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 547 case ISD::SETONE: in getPredicateForSetCC()
600 case ISD::SETONE: in getCRIdxForSetCC()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 336 case ISD::SETONE: return "setone"; in getOperationName()
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| D | TargetLowering.cpp | 207 case ISD::SETONE: in softenSetCCOperands()
1954 if (Cond == ISD::SETONE && in SimplifySetCC()
1967 if (Cond == ISD::SETONE && in SimplifySetCC()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 365 case ISD::SETONE: return "setone"; in getOperationName()
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 77 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 493 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
780 (setcc node:$lhs, node:$rhs, SETONE)>;
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 627 case ISD::SETONE: in EmitCmp()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 91 [{return N->get() == ISD::SETONE || N->get() == ISD::SETNE;}]
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| D | AMDGPUISelLowering.cpp | 966 case ISD::SETONE: in CombineFMinMaxLegacy()
1620 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFCEIL()
1841 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFFLOOR()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 84 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE, in WebAssemblyTargetLowering()
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| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 593 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
983 (setcc node:$lhs, node:$rhs, SETONE)>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 574 def SETONE : CondCode; def SETO : CondCode; def SETUO : CondCode;
1112 (setcc node:$lhs, node:$rhs, SETONE)>;
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrQPX.td | 998 def : Pat<(setcc v4f64:$FRA, v4f64:$FRB, SETONE),
1045 def : Pat<(setcc v4f32:$FRA, v4f32:$FRB, SETONE),
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| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| D | PTXInstrInfo.td | 587 defm SETPNEf32 : PTX_SETP_FP<RegF32, "f32", f32imm, SETUNE, SETONE, "ne">;
596 defm SETPNEf64 : PTX_SETP_FP<RegF64, "f64", f64imm, SETUNE, SETONE, "ne">;
|