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/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/
Dsimdintrin.h31 typedef SIMD256 SIMD; typedef
40 #define _simd_load_ps SIMD::load_ps
41 #define _simd_load1_ps SIMD::broadcast_ss
42 #define _simd_loadu_ps SIMD::loadu_ps
43 #define _simd_setzero_ps SIMD::setzero_ps
44 #define _simd_set1_ps SIMD::set1_ps
45 #define _simd_blend_ps(a, b, i) SIMD::blend_ps<i>(a, b)
46 #define _simd_blend_epi32(a, b, i) SIMD::blend_epi32<i>(a, b)
47 #define _simd_blendv_ps SIMD::blendv_ps
48 #define _simd_store_ps SIMD::store_ps
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Dsimdlib.hpp210 using SIMD = typename Traits::IsaImpl; typedef
223 r[0] = SIMD::set1_ps(p[0]); in vec4_load1_ps()
224 r[1] = SIMD::set1_ps(p[1]); in vec4_load1_ps()
225 r[2] = SIMD::set1_ps(p[2]); in vec4_load1_ps()
226 r[3] = SIMD::set1_ps(p[3]); in vec4_load1_ps()
242 r = SIMD::mul_ps(v0[0], v1[0]); // (v0.x*v1.x) in vec4_dp3_ps()
244 tmp = SIMD::mul_ps(v0[1], v1[1]); // (v0.y*v1.y) in vec4_dp3_ps()
245 r = SIMD::add_ps(r, tmp); // (v0.x*v1.x) + (v0.y*v1.y) in vec4_dp3_ps()
247 tmp = SIMD::mul_ps(v0[2], v1[2]); // (v0.z*v1.z) in vec4_dp3_ps()
248 r = SIMD::add_ps(r, tmp); // (v0.x*v1.x) + (v0.y*v1.y) + (v0.z*v1.z) in vec4_dp3_ps()
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/external/epid-sdk/ext/ipp/sources/include/
Dasmdefs.inc46 _IPP_W7=8 ; Intel(R) Streaming SIMD Extensions 2 - ia32
47 _IPP_T7=16 ; Intel(R) Streaming SIMD Extensions 3 - ia32
48 _IPP_V8=32 ; Supplemental Streaming SIMD Extensions 3 (SSSE3)
50 _IPP_P8=64 ; Intel(R) Streaming SIMD Extensions 4.2 - ia32
57 _IPP32E_M7=32 ; Intel(R) Streaming SIMD Extensions 3 - intel64
58 _IPP32E_U8=64 ; Supplemental Streaming SIMD Extensions 3 (SSSE3) - intel64
60 _IPP32E_Y8=128 ; Intel(R) Streaming SIMD Extensions 4.2 - intel64
72 ELSEIFDEF _W7 ; Intel(R) Streaming SIMD Extensions 2 - ia32
74 ELSEIFDEF _T7 ; Intel(R) Streaming SIMD Extensions 3 - ia32
76 ELSEIFDEF _V8 ; Supplemental Streaming SIMD Extensions 3 (SSSE3)
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Dippres.gen153 …rimitives. " IPP_LIB_LONGNAME() ". Optimized for processors with Streaming SIMD Extensions (SSE)\0"
159 …imitives. " IPP_LIB_LONGNAME() ". Optimized for processors with Streaming SIMD Extensions 2 (SSE2)…
165 …imitives. " IPP_LIB_LONGNAME() ". Optimized for processors with Streaming SIMD Extensions 3 (SSE3)…
171 …PP_LIB_LONGNAME() ". Optimized for processors with Supplemental Streaming SIMD Extension 3 (SSSE3)…
177 …imitives. " IPP_LIB_LONGNAME() ". Optimized for processors with Streaming SIMD Extensions 4.2 (SSE…
201 …PP_LIB_LONGNAME() ". Optimized for processors with Supplemental Streaming SIMD Extension 3 (SSSE3)…
207 …imitives. " IPP_LIB_LONGNAME() ". Optimized for processors with Streaming SIMD Extensions 4.2 (SSE…
/external/fec/
DREADME37 SIMD SUPPORT
39 This package automatically makes use of various SIMD (Single
48 Many of the SIMD versions run more than an order of
49 magnitude faster than their portable C versions. The available SIMD
51 version of each routine is automatically selected. If no SIMD
56 The SIMD-assisted versions generally produce the same results as the C
59 path metrics. On the other hand, the SIMD versions use the
67 AMD CPUs starting with the K6. SSE (SIMD Streaming Extensions) was
73 The latest IA-32 SIMD instruction set, SSE3 (also known as "Prescott
98 Add SIMD version override options
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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td1 // WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
11 /// \brief WebAssembly SIMD operand code-gen constructs.
15 // TODO: Implement SIMD instructions.
/external/libjpeg-turbo/simd/x86_64/
Djsimdcpu.asm2 ; jsimdcpu.asm - SIMD instruction support check
8 ; x86 SIMD extension for IJG JPEG library
26 ; Check if the CPU supports SIMD instructions
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrSIMD.td1 // WebAssemblyInstrSIMD.td - WebAssembly SIMD codegen support -*- tablegen -*-//
11 /// WebAssembly SIMD operand code-gen constructs.
/external/libjpeg-turbo/release/
Ddeb-control.in10 Description: A SIMD-accelerated JPEG codec that provides both the libjpeg and TurboJPEG APIs
11 libjpeg-turbo is a JPEG image codec that uses SIMD instructions (MMX, SSE2,
27 libjpeg-turbo was originally based on libjpeg/SIMD, an MMX-accelerated
DReadMe.txt1 libjpeg-turbo is a JPEG image codec that uses SIMD instructions (MMX, SSE2, AVX2, NEON, AltiVec) to…
5 libjpeg-turbo was originally based on libjpeg/SIMD, an MMX-accelerated derivative of libjpeg v6b de…
Dlibjpeg.pc.in7 Description: A SIMD-accelerated JPEG codec that provides the libjpeg API
Dlibturbojpeg.pc.in7 Description: A SIMD-accelerated JPEG codec that provides the TurboJPEG API
Drpm.spec.in36 Summary: A SIMD-accelerated JPEG codec that provides both the libjpeg and TurboJPEG APIs
54 libjpeg-turbo is a JPEG image codec that uses SIMD instructions (MMX, SSE2,
69 libjpeg-turbo was originally based on libjpeg/SIMD, an MMX-accelerated
/external/libjpeg-turbo/simd/nasm/
Djsimdcfg.inc.h67 ; On this SIMD implementation, this must be 'unsigned char'.
76 ; On this SIMD implementation, this must be 'short'.
82 ; On this SIMD implementation, this must be 'unsigned int'.
Djsimdcfg.inc42 ; On this SIMD implementation, this must be 'unsigned char'.
48 ; On this SIMD implementation, this must be 'short'.
53 ; On this SIMD implementation, this must be 'unsigned int'.
/external/libjpeg-turbo/
DChangeLog.md37 8. Fixed a severe performance issue in the Loongson MMI SIMD extensions that
53 functions in the MIPS DSPr2 SIMD extensions are now disabled at compile time
57 3. Fixed a regression in the SIMD feature detection code, introduced by
58 the AVX2 SIMD extensions (2.0 beta1[1]), that caused libjpeg-turbo to crash on
117 7. The new CMake-based build system will now disable the MIPS DSPr2 SIMD
137 1. Added AVX2 SIMD implementations of the colorspace conversion, chroma
242 12. The SIMD function symbols for x86[-64]/ELF, MIPS/ELF, macOS/x86[-64] (if
247 13. Added Loongson MMI SIMD implementations of the RGB-to-YCbCr and
257 15. Added SIMD acceleration for progressive Huffman encoding on SSE2-capable
315 2. Fixed a regression introduced by 1.5.1[1] that prevented the MIPS DSPR2 SIMD
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/external/skqp/third_party/libjpeg-turbo/
Djsimdcfg.inc42 ; On this SIMD implementation, this must be 'unsigned char'.
48 ; On this SIMD implementation, this must be 'short'.
53 ; On this SIMD implementation, this must be 'unsigned int'.
/external/skia/third_party/libjpeg-turbo/
Djsimdcfg.inc42 ; On this SIMD implementation, this must be 'unsigned char'.
48 ; On this SIMD implementation, this must be 'short'.
53 ; On this SIMD implementation, this must be 'unsigned int'.
/external/libjpeg-turbo/simd/i386/
Djsimdcpu.asm2 ; jsimdcpu.asm - SIMD instruction support check
7 ; Based on the x86 SIMD extension for IJG JPEG library
25 ; Check if the CPU supports SIMD instructions
/external/skqp/src/compute/skc/platforms/cl_12/kernels/
Dpaths_copy.cl25 // SIMD AVX2
177 // FIXME -- SIMD can be fully parallelized since a bp_ids[] load
179 // value! So... fix UPDATE_ROLLING to be SIMD-friendly instead
283 // FIXME -- SIMD can be fully parallelized since a bp_ids[] load
285 // value! So... fix UPDATE_ROLLING to be SIMD-friendly instead
321 // FIXME -- SIMD can be fully parallelized since a bp_ids[] load
323 // value! So... fix UPDATE_ROLLING to be SIMD-friendly instead
464 // FIXME -- could make this 0 for SIMD, gid&mask or get_sub_group_local_id()
Dprefix.cl176 // CPU/SIMD -- ITERATE OVER VECTOR, NO NEED FOR ATOMICS
178 // WITH SIMD, ONCE A TTS_INVALID IS DETECTED WE CAN QUIT
279 // SIMD will always grab component .s0 and then rotate the vector
308 // SIMD will always grab component .s0 and then rotate the vector
445 // SIMD
599 // SIMD
722 // SIMD
758 // SIMD
933 // TIME AND SIMD'IZED
977 // FIXME -- A SIMD-WIDE BLOCK OF TTPK KEYS CAN BE CREATED IN ONE STEP
/external/skia/src/compute/skc/platforms/cl_12/kernels/
Dpaths_copy.cl25 // SIMD AVX2
177 // FIXME -- SIMD can be fully parallelized since a bp_ids[] load
179 // value! So... fix UPDATE_ROLLING to be SIMD-friendly instead
283 // FIXME -- SIMD can be fully parallelized since a bp_ids[] load
285 // value! So... fix UPDATE_ROLLING to be SIMD-friendly instead
321 // FIXME -- SIMD can be fully parallelized since a bp_ids[] load
323 // value! So... fix UPDATE_ROLLING to be SIMD-friendly instead
464 // FIXME -- could make this 0 for SIMD, gid&mask or get_sub_group_local_id()
Dprefix.cl176 // CPU/SIMD -- ITERATE OVER VECTOR, NO NEED FOR ATOMICS
178 // WITH SIMD, ONCE A TTS_INVALID IS DETECTED WE CAN QUIT
279 // SIMD will always grab component .s0 and then rotate the vector
308 // SIMD will always grab component .s0 and then rotate the vector
445 // SIMD
599 // SIMD
722 // SIMD
758 // SIMD
933 // TIME AND SIMD'IZED
977 // FIXME -- A SIMD-WIDE BLOCK OF TTPK KEYS CAN BE CREATED IN ONE STEP
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMScheduleSwift.td557 // 4.2.28 Advanced SIMD, Integer, 2 cycle
568 // 4.2.29 Advanced SIMD, Integer, 4 cycle
569 // 4.2.30 Advanced SIMD, Integer with Accumulate
578 // 4.2.31 Advanced SIMD, Add and Shift with Narrow
585 // 4.2.32 Advanced SIMD, Vector Table Lookup
598 // 4.2.33 Advanced SIMD, Transpose
603 // 4.2.34 Advanced SIMD and VFP, Floating Point
613 // 4.2.35 Advanced SIMD and VFP, Multiply
623 // 4.2.36 Advanced SIMD and VFP, Convert
626 // 4.2.37 Advanced SIMD and VFP, Move
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/external/llvm/lib/Target/ARM/
DARMScheduleSwift.td540 // 4.2.28 Advanced SIMD, Integer, 2 cycle
551 // 4.2.29 Advanced SIMD, Integer, 4 cycle
552 // 4.2.30 Advanced SIMD, Integer with Accumulate
561 // 4.2.31 Advanced SIMD, Add and Shift with Narrow
568 // 4.2.32 Advanced SIMD, Vector Table Lookup
581 // 4.2.33 Advanced SIMD, Transpose
586 // 4.2.34 Advanced SIMD and VFP, Floating Point
596 // 4.2.35 Advanced SIMD and VFP, Multiply
608 // 4.2.36 Advanced SIMD and VFP, Convert
613 // 4.2.37 Advanced SIMD and VFP, Move
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