Searched refs:SLLG (Results 1 – 14 of 14) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | clear-liverange-spillreg.mir | 226 %6 = SLLG %120, $noreg, 1
293 %62 = SLLG %81, $noreg, 1
301 %72 = SLLG %71, $noreg, 1
304 %75 = SLLG %74, $noreg, 1
313 %82 = SLLG %81, $noreg, 1
318 %86 = SLLG %70, $noreg, 1
320 %88 = SLLG %67, $noreg, 3
323 %91 = SLLG %90, $noreg, 1
|
| D | shift-05.ll | 5 ; Check the low end of the SLLG range.
14 ; Check the high end of the defined SLLG range.
|
| D | shift-12.ll | 56 ; Test removal of AND mask from SLLG.
|
| /external/llvm/test/CodeGen/SystemZ/ |
| D | shift-05.ll | 5 ; Check the low end of the SLLG range.
14 ; Check the high end of the defined SLLG range.
|
| D | shift-12.ll | 56 ; Test removal of AND mask from SLLG.
|
| /external/v8/src/s390/ |
| D | simulator-s390.h | 1082 EVALUATE(SLLG);
|
| D | constants-s390.h | 161 V(sllg, SLLG, 0xEB0D) /* type = RSY_A SHIFT LEFT SINGLE LOGICAL (64) */ \
|
| D | simulator-s390.cc | 1370 EvalTable[SLLG] = &Simulator::Evaluate_SLLG; in EvalTableInit()
8715 EVALUATE(SLLG) { in EVALUATE() argument
8716 DCHECK_OPCODE(SLLG); in EVALUATE()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 180 SllgMI->setDesc(get(SystemZ::SLLG)); in expandLoadStackGuard()
|
| D | SystemZInstrInfo.td | 1212 def SLLG : BinaryRSY<"sllg", 0xEB0D, shl, GR64>;
1735 (SLLG GR64:$val, (NILL GR32:$shift, uimm32:$imm), 0)>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 257 BuildMI(*MBB, MI, MI->getDebugLoc(), get(SystemZ::SLLG), Reg64) in expandLoadStackGuard()
|
| D | SystemZInstrInfo.td | 1356 def SLLG : BinaryRSY<"sllg", 0xEB0D, shiftop<shl>, GR64>;
2175 (SLLG GR64:$val, (NILL GR32:$shift, imm32zx16trunc:$imm), 0)>;
|
| /external/capstone/arch/SystemZ/ |
| D | SystemZGenAsmWriter.inc | 844 977278133U, // SLLG
|
| D | SystemZGenDisassemblerTables.inc | 1189 /* 1422 */ MCD_OPC_Decode, 183, 6, 119, // Opcode: SLLG
|