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Searched refs:SLT (Results 1 – 25 of 62) sorted by relevance

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/external/llvm/lib/Target/AMDGPU/
DAMDGPUTargetTransformInfo.cpp130 MVT::SimpleValueType SLT = LT.second.getScalarType().SimpleTy; in getArithmeticInstrCost() local
136 if (SLT == MVT::i64) in getArithmeticInstrCost()
147 if (SLT == MVT::i64){ in getArithmeticInstrCost()
156 if (SLT == MVT::i64) { in getArithmeticInstrCost()
167 if (SLT == MVT::f64) in getArithmeticInstrCost()
170 if (SLT == MVT::f32 || SLT == MVT::f16) in getArithmeticInstrCost()
178 if (SLT == MVT::f64) { in getArithmeticInstrCost()
189 if (SLT == MVT::f32 || SLT == MVT::f16) { in getArithmeticInstrCost()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUTargetTransformInfo.cpp356 MVT::SimpleValueType SLT = LT.second.getScalarType().SimpleTy; in getArithmeticInstrCost() local
362 if (SLT == MVT::i64) in getArithmeticInstrCost()
372 if (SLT == MVT::i64){ in getArithmeticInstrCost()
380 if (SLT == MVT::i64) { in getArithmeticInstrCost()
391 if (SLT == MVT::f64) in getArithmeticInstrCost()
394 if (SLT == MVT::f32 || SLT == MVT::f16) in getArithmeticInstrCost()
401 if (SLT == MVT::f64) { in getArithmeticInstrCost()
412 if ((SLT == MVT::f32 && !ST->hasFP32Denormals()) || in getArithmeticInstrCost()
413 (SLT == MVT::f16 && ST->has16BitInsts())) { in getArithmeticInstrCost()
418 if (SLT == MVT::f16 && ST->has16BitInsts()) { in getArithmeticInstrCost()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/loop-idiom/
Dmemmove-rt-check.ll11 ; CHECK: [[SLT:%[0-9]+]] = icmp sle i32 [[LEN]], [[SUB]]
12 ; CHECK: [[CND:%[0-9]+]] = or i1 [[ULT]], [[SLT]]
/external/mesa3d/src/gallium/tests/graw/fragment-shader/
Dfrag-slt.sh10 SLT TEMP[0], IN[0], IMM[0]
Dfrag-kil.sh12 SLT TEMP[0], IN[0], IMM[0]
/external/mesa3d/src/gallium/tests/graw/vertex-shader/
Dvert-slt.sh12 SLT TEMP[0], IN[0], IMM[0]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsCondMov.td198 defm : MovzPats0<GPR32, GPR32, MOVZ_I_I, SLT, SLTu, SLTi, SLTiu>,
203 defm : MovzPats0<GPR32, GPR64, MOVZ_I_I64, SLT, SLTu, SLTi, SLTiu>,
231 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S, SLT, SLTu, SLTi, SLTiu>,
243 defm : MovzPats0<GPR32, AFGR64, MOVZ_I_D32, SLT, SLTu, SLTi, SLTiu>,
250 defm : MovzPats0<GPR32, FGR64, MOVZ_I_D64, SLT, SLTu, SLTi, SLTiu>,
DMipsFastISel.cpp681 emitInst(Mips::SLT, ResultReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
684 emitInst(Mips::SLT, ResultReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
688 emitInst(Mips::SLT, TempReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
694 emitInst(Mips::SLT, TempReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
/external/llvm/lib/Target/Mips/
DMipsCondMov.td199 defm : MovzPats0<GPR32, GPR32, MOVZ_I_I, SLT, SLTu, SLTi, SLTiu>,
204 defm : MovzPats0<GPR32, GPR64, MOVZ_I_I64, SLT, SLTu, SLTi, SLTiu>,
232 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S, SLT, SLTu, SLTi, SLTiu>,
244 defm : MovzPats0<GPR32, AFGR64, MOVZ_I_D32, SLT, SLTu, SLTi, SLTiu>,
251 defm : MovzPats0<GPR32, FGR64, MOVZ_I_D64, SLT, SLTu, SLTi, SLTiu>,
DMipsFastISel.cpp642 emitInst(Mips::SLT, ResultReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
646 emitInst(Mips::SLT, ResultReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
651 emitInst(Mips::SLT, TempReg).addReg(LeftReg).addReg(RightReg); in emitCmp()
657 emitInst(Mips::SLT, TempReg).addReg(RightReg).addReg(LeftReg); in emitCmp()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dinstalias-imm-expanding.s566 # MIPS-NEXT: # <MCInst #{{[0-9]+}} SLT
574 # MIPS-NEXT: # <MCInst #{{[0-9]+}} SLT
592 # MIPS-NEXT: # <MCInst #{{[0-9]+}} SLT
600 # MIPS-NEXT: # <MCInst #{{[0-9]+}} SLT
606 # MIPS-NEXT: # <MCInst #{{[0-9]+}} SLT
613 # MIPS-NEXT: # <MCInst #{{[0-9]+}} SLT
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVInstrInfo.td339 def SLT : ALU_rr<0b0000000, 0b010, "slt">;
484 def : InstAlias<"sltz $rd, $rs", (SLT GPR:$rd, GPR:$rs, X0)>;
485 def : InstAlias<"sgtz $rd, $rs", (SLT GPR:$rd, X0, GPR:$rs)>;
489 def : InstAlias<"sgt $rd, $rs, $rt", (SLT GPR:$rd, GPR:$rt, GPR:$rs), 0>;
610 def : PatGprGpr<setlt, SLT>;
622 def : Pat<(setgt GPR:$rs1, GPR:$rs2), (SLT GPR:$rs2, GPR:$rs1)>;
623 def : Pat<(setge GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs1, GPR:$rs2), 1)>;
624 def : Pat<(setle GPR:$rs1, GPR:$rs2), (XORI (SLT GPR:$rs2, GPR:$rs1), 1)>;
/external/mesa3d/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h53 OP12(SLT)
Dtgsi_info_opcodes.h15 OPCODE(1, 2, COMP, SLT)
/external/mesa3d/src/mesa/program/
Dprogram_lexer.l222 SLT{sat} { return_opcode( 1, BIN_OP, SLT, 3); }
/external/virglrenderer/src/gallium/auxiliary/tgsi/
Dtgsi_opcode_tmp.h73 OP12(SLT)
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrInfo.td664 def SLT : SetCC_R<0x00, 0x2a, "slt", setlt, CPURegs>;
951 defm : BrcondPats<CPURegs, BEQ, BNE, SLT, SLTu, SLTi, SLTiu, ZERO>;
956 (MOVZInst RC:$T, (SLT CPURegs:$lhs, CPURegs:$rhs), RC:$F)>;
964 (MOVZInst RC:$T, (SLT CPURegs:$rhs, CPURegs:$lhs), RC:$F)>;
1024 defm : SetlePats<CPURegs, SLT, SLTu>;
1025 defm : SetgtPats<CPURegs, SLT, SLTu>;
1026 defm : SetgePats<CPURegs, SLT, SLTu>;
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dbranch-07.ll52 ; Test SLT.
Dint-cmp-44.ll48 ; SLT requires a comparison.
281 ; ...and SLT.
377 ; ...and the SLT case.
/external/llvm/test/CodeGen/SystemZ/
Dbranch-07.ll52 ; Test SLT.
Dint-cmp-44.ll48 ; SLT requires a comparison.
281 ; ...and SLT.
377 ; ...and the SLT case.
/external/pcre/dist2/src/sljit/
DsljitNativeMIPS_32.c274 FAIL_IF(push_inst(compiler, SLT | S(src1) | T(src2) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
278 FAIL_IF(push_inst(compiler, SLT | S(src2) | T(src1) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
DsljitNativeMIPS_64.c365 FAIL_IF(push_inst(compiler, SLT | S(src1) | T(src2) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
369 FAIL_IF(push_inst(compiler, SLT | S(src2) | T(src1) | DA(OTHER_FLAG), OTHER_FLAG)); in emit_single_op()
/external/v8/src/mips/
Dconstants-mips.h534 SLT = ((5U << 3) + 2), enumerator
1293 FunctionFieldToBitNumber(SLT) | FunctionFieldToBitNumber(SLTU) |
/external/v8/src/mips64/
Dconstants-mips64.h526 SLT = ((5U << 3) + 2), enumerator
1339 FunctionFieldToBitNumber(SLT) | FunctionFieldToBitNumber(SLTU) |

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