Searched refs:SMEM (Results 1 – 25 of 29) sorted by relevance
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
| D | spill-wide-sgpr.ll | 2 …spill-sgpr-to-smem=1 -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=SMEM %s
6 ; SMEM: s_add_u32 m0, s3, 0x100{{$}}
7 ; SMEM: s_buffer_store_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s[8:11], m0 ; 8-byte Folded Spill
8 ; SMEM: s_cbranch_scc1
10 ; SMEM: s_add_u32 m0, s3, 0x100{{$}}
11 ; SMEM: s_buffer_load_dwordx2 s{{\[[0-9]+:[0-9]+\]}}, s[8:11], m0 ; 8-byte Folded Reload
13 ; SMEM: s_dcache_wb
14 ; SMEM: s_endpgm
17 ; SMEM: ScratchSize: 12
47 ; SMEM: s_add_u32 m0, s3, 0x100{{$}}
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| D | si-spill-sgpr-stack.ll | 2 …spill-sgpr-to-smem=1 -verify-machineinstrs < %s | FileCheck -check-prefix=ALL -check-prefix=SMEM %s
19 ; SMEM: s_add_u32 m0, s[[OFF]], 0x100{{$}}
20 ; SMEM: s_buffer_store_dwordx4 s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[LO]]:[[HI]]], m0 ; 16-byte Folded S…
22 ; SMEM: s_add_u32 m0, s[[OFF]], 0x100{{$}}
23 ; SMEM: s_buffer_load_dwordx4 s{{\[[0-9]+:[0-9]+\]}}, s{{\[}}[[LO]]:[[HI]]], m0 ; 16-byte Folded Re…
25 ; SMEM: s_dcache_wb
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| D | spill-to-smem-m0.ll | 3 ; Spill to SMEM clobbers M0. Check that the implicit-def dead operand is present
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| D | attr-amdgpu-num-sgpr-spill-to-smem.ll | 3 ; FIXME: SGPR-to-SMEM requires an additional SGPR always to scavenge m0
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| D | attr-amdgpu-num-sgpr.ll | 7 ; FIXME: SGPR-to-SMEM requires an additional SGPR always to scavenge m0
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| D | spill-m0.ll | 113 ; Force save and restore of m0 during SMEM spill
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| /external/llvm/lib/Target/AMDGPU/ |
| D | GCNHazardRecognizer.cpp | 142 int GCNHazardRecognizer::checkSMEMSoftClauseHazards(MachineInstr *SMEM) { in checkSMEMSoftClauseHazards() argument
177 if (SMEM->mayStore()) in checkSMEMSoftClauseHazards()
180 addRegsToSet(SMEM->defs(), ClauseDefs); in checkSMEMSoftClauseHazards()
181 addRegsToSet(SMEM->uses(), ClauseUses); in checkSMEMSoftClauseHazards()
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| D | GCNHazardRecognizer.h | 42 int checkSMEMSoftClauseHazards(MachineInstr *SMEM);
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| D | SIInsertWaits.cpp | 48 SMEM, enumerator
326 LastOpcodeType = SMEM; in pushInstruction()
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| D | VIInstructions.td | 105 // SMEM Instructions
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | GCNHazardRecognizer.h | 63 int checkSoftClauseHazards(MachineInstr *SMEM);
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| D | SIInstrFormats.td | 80 // SMEM instructions like the cache flush ones.
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| D | SMInstructions.td | 239 // XXX - SMEM instructions do not allow exec for data operand, but
252 // SI/CI, bit disallowed for SMEM on VI.
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| D | SIInstructions.td | 506 // use it in the sdata operand of SMEM instructions. We still need to
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| /external/skia/src/compute/skc/platforms/cl_12/kernels/ |
| D | segment_ttrk.cl | 28 // THE BEST TYPE TO ZERO SMEM
282 // ZERO SMEM
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| D | fills_expand.cl | 122 // local SMEM queue and flush when full. It may or may not be a
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| D | render.cl | 159 // predicated if SMEM is really at a premium.
502 // FIXME -- if the SMEM store is wider than bank word count then we
540 // predicated if SMEM is really at a premium.
1553 // IT'S EASY TO TRANSPOSE THIS IN SMEM BEFORE STORING BUT IN THIS
1604 // IT'S EASY TO TRANSPOSE THIS IN SMEM BEFORE STORING BUT IN THIS
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| D | place.cl | 417 // SMEM loads
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| D | rasterize.cl | 244 // FIXME -- there is now plenty of SMEM to allocate a LOT of block ids
2043 // INITIALIZE SMEM
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| /external/skqp/src/compute/skc/platforms/cl_12/kernels/ |
| D | segment_ttrk.cl | 28 // THE BEST TYPE TO ZERO SMEM
282 // ZERO SMEM
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| D | fills_expand.cl | 122 // local SMEM queue and flush when full. It may or may not be a
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| D | render.cl | 159 // predicated if SMEM is really at a premium.
502 // FIXME -- if the SMEM store is wider than bank word count then we
540 // predicated if SMEM is really at a premium.
1553 // IT'S EASY TO TRANSPOSE THIS IN SMEM BEFORE STORING BUT IN THIS
1604 // IT'S EASY TO TRANSPOSE THIS IN SMEM BEFORE STORING BUT IN THIS
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| D | place.cl | 417 // SMEM loads
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| D | rasterize.cl | 244 // FIXME -- there is now plenty of SMEM to allocate a LOT of block ids
2043 // INITIALIZE SMEM
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| /external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
| D | AMDGPUOperandSyntax.rst | 538 SMRD/SMEM Modifiers
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