Searched refs:SPECIAL2 (Results 1 – 10 of 10) sorted by relevance
| /external/v8/src/mips/ |
| D | constants-mips.h | 454 SPECIAL2 = ((3U << 3) + 4) << kOpcodeShift, enumerator
1510 case SPECIAL2: in SecondaryValue()
1704 case SPECIAL2: in InstructionType()
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| D | disasm-mips.cc | 1640 case SPECIAL2: in DecodeTypeRegister()
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| D | assembler-mips.cc | 1921 GenInstrRegister(SPECIAL2, rs, rt, rd, 0, MUL); in mul()
2522 GenInstrRegister(SPECIAL2, rs, rd, rd, 0, CLZ); in clz()
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| D | simulator-mips.cc | 6233 case SPECIAL2: in DecodeTypeRegister()
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 428 SPECIAL2 = ((3U << 3) + 4) << kOpcodeShift, enumerator
1567 case SPECIAL2: in SecondaryValue()
1762 case SPECIAL2: in InstructionType()
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| D | assembler-mips64.cc | 1915 GenInstrRegister(SPECIAL2, rs, rt, rd, 0, MUL); in mul()
2830 GenInstrRegister(SPECIAL2, rs, rd, rd, 0, CLZ); in clz()
2840 GenInstrRegister(SPECIAL2, rs, rd, rd, 0, DCLZ); in dclz()
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| D | disasm-mips64.cc | 1866 case SPECIAL2: in DecodeTypeRegister()
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| D | simulator-mips64.cc | 6464 case SPECIAL2: in DecodeTypeRegister()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsInstrFormats.td | 910 let Inst{31-26} = 0b011100; // SPECIAL2
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsInstrFormats.td | 920 let Inst{31-26} = 0b011100; // SPECIAL2
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