| /external/v8/src/mips/ |
| D | constants-mips.h | 506 SRAV = ((0U << 3) + 7), enumerator
1285 FunctionFieldToBitNumber(SRAV) | FunctionFieldToBitNumber(LSA) |
|
| D | disasm-mips.cc | 1330 case SRAV: in DecodeTypeRegisterSPECIAL()
|
| /external/v8/src/mips64/ |
| D | constants-mips64.h | 488 SRAV = ((0U << 3) + 7), enumerator
1326 FunctionFieldToBitNumber(SRAV) | FunctionFieldToBitNumber(DSRAV) |
|
| D | disasm-mips64.cc | 1507 case SRAV: in DecodeTypeRegisterSPECIAL()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips1/ |
| D | valid.s | 144 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
| D | valid.s | 183 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips3/ |
| D | valid.s | 248 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32/ |
| D | valid.s | 246 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeMIPS_32.c | 405 EMIT_SHIFT(SRA, SRAV); in emit_single_op()
|
| D | sljitNativeMIPS_64.c | 499 EMIT_SHIFT(DSRA, DSRA32, SRA, DSRAV, SRAV); in emit_single_op()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r5/ |
| D | valid.s | 296 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r3/ |
| D | valid.s | 295 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r2/ |
| D | valid.s | 295 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r3/ |
| D | valid.s | 361 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64/ |
| D | valid.s | 327 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r5/ |
| D | valid.s | 367 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips4/ |
| D | valid.s | 308 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips5/ |
| D | valid.s | 309 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r2/ |
| D | valid.s | 371 # CHECK-NEXT: # <MCInst #{{[0-9]+}} SRAV
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsScheduleP5600.td | 213 ADDu, SLLV, SRAV, SRLV, LSA, COPY)>;
|
| D | MipsInstrInfo.td | 2086 def SRAV : MMRel, shift_rotate_reg<"srav", GPR32Opnd, II_SRAV, sra>,
2782 (SRAV GPR32Opnd:$rd, GPR32Opnd:$rt, GPR32Opnd:$rs), 0>;
2788 (SRAV GPR32Opnd:$rd, GPR32Opnd:$rd, GPR32Opnd:$rt), 0>;
|
| D | MipsFastISel.cpp | 1994 Opcode = Mips::SRAV; in selectShift()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 767 {DBGFIELD("SRAV") 1, false, false, 1, 2, 1, 1, 0, 0}, // #492
1787 {DBGFIELD("SRAV") 16382, false, false, 0, 0, 0, 0, 0, 0}, // #492
2699 case 492: // SRAV
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1768 Opcode = Mips::SRAV; in selectShift()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsInstrInfo.td | 677 def SRAV : LogicR_shift_rotate_reg<0x07, 0x00, "srav", sra>;
|