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Searched refs:Src2Reg (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCDuplexInfo.cpp178 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
318 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
320 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
326 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
334 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
336 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
353 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
355 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
363 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
364 if (HexagonMCInstrInfo::isDblRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
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DHexagonMCCompound.cpp84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
102 Src2Reg = MI.getOperand(2).getReg(); in getCompoundCandidateGroup()
105 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg)) in getCompoundCandidateGroup()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCDuplexInfo.cpp186 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
320 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
322 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
328 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
336 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
338 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
355 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
357 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
365 Src2Reg = MCI.getOperand(2).getReg(); in getDuplexCandidateGroup()
366 if (HexagonMCInstrInfo::isDblRegForSubInst(Src2Reg) && in getDuplexCandidateGroup()
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DHexagonMCCompound.cpp82 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
100 Src2Reg = MI.getOperand(2).getReg(); in getCompoundCandidateGroup()
103 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg)) in getCompoundCandidateGroup()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp1140 unsigned Src2Reg = MI.getOperand(2).getReg(); in expandPostRAPseudo() local
1143 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
1144 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
1164 unsigned Src2Reg = MI.getOperand(2).getReg(); in expandPostRAPseudo() local
1168 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::subreg_hireg); in expandPostRAPseudo()
1169 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::subreg_loreg); in expandPostRAPseudo()
1194 unsigned Src2Reg = MI.getOperand(2).getReg(); in expandPostRAPseudo() local
1212 .addReg(Src2Reg, Src2RegIsKill) in expandPostRAPseudo()
3304 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
3320 Src2Reg = MI->getOperand(2).getReg(); in getCompoundCandidateGroup()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp1168 unsigned Src2Reg = MI.getOperand(2).getReg(); in expandPostRAPseudo() local
1171 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::isub_hi); in expandPostRAPseudo()
1172 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::isub_lo); in expandPostRAPseudo()
1192 unsigned Src2Reg = MI.getOperand(2).getReg(); in expandPostRAPseudo() local
1196 unsigned Src2SubHi = HRI.getSubReg(Src2Reg, Hexagon::isub_hi); in expandPostRAPseudo()
1197 unsigned Src2SubLo = HRI.getSubReg(Src2Reg, Hexagon::isub_lo); in expandPostRAPseudo()
3238 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getCompoundCandidateGroup() local
3254 Src2Reg = MI.getOperand(2).getReg(); in getCompoundCandidateGroup()
3257 isIntRegForSubInst(Src1Reg) && isIntRegForSubInst(Src2Reg)) in getCompoundCandidateGroup()
3670 unsigned DstReg, SrcReg, Src1Reg, Src2Reg; in getDuplexCandidateGroup() local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DMLxExpansionPass.cpp213 unsigned Src2Reg = MI->getOperand(3).getReg(); in ExpandFPMLxInstruction() local
227 .addReg(Src2Reg, getKillRegState(Src2Kill)); in ExpandFPMLxInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp279 unsigned Src2Reg = MI->getOperand(3).getReg(); in ExpandFPMLxInstruction() local
295 .addReg(Src2Reg, getKillRegState(Src2Kill)); in ExpandFPMLxInstruction()
/external/llvm/lib/Target/ARM/
DMLxExpansionPass.cpp279 unsigned Src2Reg = MI->getOperand(3).getReg(); in ExpandFPMLxInstruction() local
295 .addReg(Src2Reg, getKillRegState(Src2Kill)); in ExpandFPMLxInstruction()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp2652 unsigned Src2Reg = getRegForValue(Src2Val); in optimizeSelect() local
2653 if (!Src2Reg) in optimizeSelect()
2662 Src1IsKill, Src2Reg, Src2IsKill); in optimizeSelect()
2780 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); in selectSelect() local
2783 if (!Src1Reg || !Src2Reg) in selectSelect()
2787 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
2791 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
/external/llvm/lib/Target/AArch64/
DAArch64FastISel.cpp2563 unsigned Src2Reg = getRegForValue(Src2Val); in optimizeSelect() local
2564 if (!Src2Reg) in optimizeSelect()
2573 Src1IsKill, Src2Reg, Src2IsKill); in optimizeSelect()
2691 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); in selectSelect() local
2694 if (!Src1Reg || !Src2Reg) in selectSelect()
2698 Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
2702 unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg, in selectSelect()
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp995 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); in selectSelect() local
998 if (!Src1Reg || !Src2Reg || !CondReg) in selectSelect()
1014 emitInst(TargetOpcode::COPY, TempReg).addReg(Src2Reg); in selectSelect()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsFastISel.cpp1033 unsigned Src2Reg = getRegForValue(SI->getFalseValue()); in selectSelect() local
1036 if (!Src1Reg || !Src2Reg || !CondReg) in selectSelect()
1052 emitInst(TargetOpcode::COPY, TempReg).addReg(Src2Reg); in selectSelect()