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Searched refs:TailCall (Results 1 – 21 of 21) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrInfo.h319 const MachineInstr &TailCall) const override;
322 const MachineInstr &TailCall) const override;
DX86InstrInfo.cpp2480 const MachineInstr &TailCall) const { in canMakeTailCallConditional()
2481 if (TailCall.getOpcode() != X86::TCRETURNdi && in canMakeTailCallConditional()
2482 TailCall.getOpcode() != X86::TCRETURNdi64) { in canMakeTailCallConditional()
2487 const MachineFunction *MF = TailCall.getParent()->getParent(); in canMakeTailCallConditional()
2501 TailCall.getOperand(1).getImm() != 0) { in canMakeTailCallConditional()
2511 const MachineInstr &TailCall) const { in replaceBranchWithTailCall()
2512 assert(canMakeTailCallConditional(BranchCond, TailCall)); in replaceBranchWithTailCall()
2530 unsigned Opc = TailCall.getOpcode() == X86::TCRETURNdi ? X86::TCRETURNdicc in replaceBranchWithTailCall()
2534 MIB->addOperand(TailCall.getOperand(0)); // Destination. in replaceBranchWithTailCall()
2537 MIB.copyImplicitOps(TailCall); // Regmask and (imp-used) parameters. in replaceBranchWithTailCall()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DTargetInstrInfo.h1186 const MachineInstr &TailCall) const { in canMakeTailCallConditional() argument
1193 const MachineInstr &TailCall) const { in replaceBranchWithTailCall() argument
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DBranchFolding.cpp1605 MachineInstr &TailCall = *MBB->getFirstNonDebugInstr(); in OptimizeBlock() local
1606 if (TII->isUnconditionalTailCall(TailCall)) { in OptimizeBlock()
1618 if (TII->canMakeTailCallConditional(PredCond, TailCall)) { in OptimizeBlock()
1622 TII->replaceBranchWithTailCall(*Pred, PredCond, TailCall); in OptimizeBlock()
/external/v8/src/compiler/
Dcommon-operator.h521 const Operator* TailCall(const CallDescriptor* call_descriptor); in NON_EXPORTED_BASE()
Draw-machine-assembler.cc249 MakeNode(common()->TailCall(call_descriptor), input_count, inputs); in TailCallN()
Dopcodes.h31 V(TailCall) \
Dint64-lowering.cc337 NodeProperties::ChangeOp(node, common()->TailCall(new_descriptor)); in LowerNode()
Dtyper.cc120 DECLARE_CASE(TailCall) in Reduce()
186 DECLARE_CASE(TailCall) in TypeNode()
Dcommon-operator.cc1465 const Operator* CommonOperatorBuilder::TailCall( in TailCall() function in v8::internal::compiler::CommonOperatorBuilder
/external/v8/src/interpreter/
Dbytecode-array-builder.h283 BytecodeArrayBuilder& TailCall(Register callable, RegisterList args,
/external/llvm/lib/Target/Mips/
DMipsISelLowering.h38 TailCall, enumerator
DMipsInstrInfo.td56 def MipsTailCall : SDNode<"MipsISD::TailCall", SDT_MipsJmpLink,
1355 class TailCall<Instruction JumpInst> :
1901 def TAILCALL : TailCall<J>;
DMipsISelLowering.cpp114 case MipsISD::TailCall: return "MipsISD::TailCall"; in getTargetNodeName()
2880 return DAG.getNode(MipsISD::TailCall, DL, MVT::Other, Ops); in LowerCall()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsISelLowering.h68 TailCall, enumerator
DMipsInstrInfo.td56 def MipsTailCall : SDNode<"MipsISD::TailCall", SDT_MipsJmpLink,
1643 class TailCall<Instruction JumpInst, DAGOperand Opnd> :
2265 def TAILCALL : TailCall<J, jmptarget>, ISA_MIPS1;
DMipsISelLowering.cpp188 case MipsISD::TailCall: return "MipsISD::TailCall"; in getTargetNodeName()
3166 return DAG.getNode(MipsISD::TailCall, DL, MVT::Other, Ops); in LowerCall()
DMicroMipsInstrInfo.td1119 def TAILCALL_MM : TailCall<J_MM, jmptarget_mm>, ISA_MIPS1_NOT_32R6_64R6;
DMicroMips32r6InstrInfo.td1757 def TAILCALL_MMR6 : TailCall<BC_MMR6, brtarget26_mm>, ISA_MICROMIPS32R6;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenFastISel.inc967 // FastEmit functions for MipsISD::TailCall.
1209 case MipsISD::TailCall: return fastEmit_MipsISD_TailCall_r(VT, RetVT, Op0, Op0IsKill);
DMipsGenDAGISel.inc23094 /* 42955*/ /*SwitchOpcode*/ 63|128,1/*191*/, TARGET_VAL(MipsISD::TailCall),// ->43150