/external/llvm/test/CodeGen/AArch64/ |
D | divrem.ll | 3 ; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | divrem.ll | 3 ; SDIVREM/UDIVREM DAG nodes are generated but expanded when lowering and
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 198 SDIVREM, UDIVREM, enumerator
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 204 SDIVREM, UDIVREM, enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 210 SDIVREM, UDIVREM, enumerator
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/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
D | BlackfinISelLowering.cpp | 87 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in BlackfinTargetLowering() 88 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in BlackfinTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.h | 94 UDIVREM, enumerator
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 154 setOperationAction(ISD::UDIVREM, MVT::i8, Expand); in MSP430TargetLowering() 160 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRISelLowering.cpp | 154 setOperationAction(ISD::UDIVREM, VT, Custom); in AVRTargetLowering() 333 assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) && in LowerDivRem() 698 case ISD::UDIVREM: in LowerOperation()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 187 case ISD::UDIVREM: return "udivrem"; in getOperationName()
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D | LegalizeVectorOps.cpp | 270 case ISD::UDIVREM: in LegalizeOp()
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 185 setOperationAction(ISD::UDIVREM, MVT::i8, Expand); in SPUTargetLowering() 191 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in SPUTargetLowering() 197 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in SPUTargetLowering() 203 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in SPUTargetLowering() 209 setOperationAction(ISD::UDIVREM, MVT::i128, Expand); in SPUTargetLowering()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 147 setOperationAction(ISD::UDIVREM, MVT::i8, Expand); in MSP430TargetLowering() 153 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 199 setOperationAction(ISD::UDIVREM, MVT::i64, Custom); in MipsSETargetLowering() 206 setOperationAction(ISD::UDIVREM, MVT::i32, Custom); in MipsSETargetLowering() 234 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MipsSETargetLowering() 281 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in MipsSETargetLowering() 457 case ISD::UDIVREM: return lowerMulDiv(Op, MipsISD::DivRemU, true, true, in LowerOperation()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 301 setOperationAction(ISD::UDIVREM, VT, Custom); in AMDGPUTargetLowering() 386 setOperationAction(ISD::UDIVREM, VT, Expand); in AMDGPUTargetLowering() 710 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG); in LowerOperation() 1359 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64() 1571 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); in LowerSDIVREM()
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/external/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 130 setOperationAction(ISD::UDIVREM, MVT::i64, Custom); in MipsSETargetLowering() 137 setOperationAction(ISD::UDIVREM, MVT::i32, Custom); in MipsSETargetLowering() 167 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MipsSETargetLowering() 214 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in MipsSETargetLowering() 371 case ISD::UDIVREM: return lowerMulDiv(Op, MipsISD::DivRemU, true, true, in LowerOperation()
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/external/llvm/lib/Target/BPF/ |
D | BPFISelLowering.cpp | 81 setOperationAction(ISD::UDIVREM, MVT::i64, Expand); in BPFTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 220 case ISD::UDIVREM: return "udivrem"; in getOperationName()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 98 ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, in WebAssemblyTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZISelDAGToDAG.cpp | 683 case ISD::UDIVREM: { in Select()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.cpp | 128 setOperationAction(ISD::UDIVREM, MVT::i8, Promote); in MSP430TargetLowering() 134 setOperationAction(ISD::UDIVREM, MVT::i16, Expand); in MSP430TargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
D | BPFISelLowering.cpp | 88 setOperationAction(ISD::UDIVREM, VT, Expand); in BPFTargetLowering()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 357 setOperationAction(ISD::UDIVREM, VT, Custom); in AMDGPUTargetLowering() 427 setOperationAction(ISD::UDIVREM, VT, Expand); in AMDGPUTargetLowering() 1130 case ISD::UDIVREM: return LowerUDIVREM(Op, DAG); in LowerOperation() 1577 SDValue Res = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(HalfVT, HalfVT), in LowerUDIVREM64() 1921 SDValue Div = DAG.getNode(ISD::UDIVREM, DL, DAG.getVTList(VT, VT), LHS, RHS); in LowerSDIVREM()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.cpp | 110 ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS, in WebAssemblyTargetLowering()
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeISelLowering.cpp | 104 setOperationAction(ISD::UDIVREM, MVT::i32, Expand); in MBlazeTargetLowering()
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