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Searched refs:UO_F32 (Results 1 – 19 of 19) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMLegalizerInfo.cpp217 {RTLIB::UO_F32, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
223 {RTLIB::UO_F32, CmpInst::BAD_ICMP_PREDICATE}}; in setFCmpLibcallsAEABI()
267 FCmp32Libcalls[CmpInst::FCMP_UNO] = {{RTLIB::UO_F32, CmpInst::ICMP_NE}}; in setFCmpLibcallsGNU()
271 {RTLIB::UO_F32, CmpInst::ICMP_NE}}; in setFCmpLibcallsGNU()
DARMISelLowering.cpp269 { RTLIB::UO_F32, "__unordsf2vfp", ISD::SETNE }, in ARMTargetLowering()
361 { RTLIB::UO_F32, "__aeabi_fcmpun", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DRuntimeLibcalls.h254 UO_F32, enumerator
/external/llvm/include/llvm/CodeGen/
DRuntimeLibcalls.h322 UO_F32, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/WebAssembly/
Dlibcalls.ll62 ; fcmp ord and unord (RTLIB::O_F32 / RTLIB::UO_F32 etc) are a special case (see
/external/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp92 { RTLIB::UO_F32, "__mips16_unordsf2" }
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips16ISelLowering.cpp92 { RTLIB::UO_F32, "__mips16_unordsf2" }
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/
DRuntimeLibcalls.def358 HANDLE_LIBCALL(UO_F32, "__unordsf2")
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp344 Names[RTLIB::UO_F32] = "__unordsf2"; in InitLibcallNames()
787 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeFloatTypes.cpp648 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64; in SoftenSetCCOperands()
654 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64; in SoftenSetCCOperands()
DTargetLowering.cpp286 Names[RTLIB::UO_F32] = "__unordsf2"; in InitLibcallNames()
537 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyRuntimeLibcallSignatures.cpp299 Table[RTLIB::UO_F32] = i32_func_f32_f32; in RuntimeLibcallSignatureTable()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp521 CCs[RTLIB::UO_F32] = ISD::SETNE; in InitCmpLibcallCCs()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelLowering.cpp206 setLibcallName(RTLIB::UO_F32, "__unordsf2vfp"); in ARMTargetLowering()
215 setCmpLibcallCC(RTLIB::UO_F32, ISD::SETNE); in ARMTargetLowering()
330 setLibcallName(RTLIB::UO_F32, "__aeabi_fcmpun"); in ARMTargetLowering()
331 setCmpLibcallCC(RTLIB::UO_F32, ISD::SETNE); in ARMTargetLowering()
340 setLibcallCallingConv(RTLIB::UO_F32, CallingConv::ARM_AAPCS); in ARMTargetLowering()
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp198 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
217 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp203 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
222 LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : in softenSetCCOperands()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1681 setLibcallName(RTLIB::UO_F32, "__hexagon_unordsf2"); in HexagonTargetLowering()
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp2179 setLibcallName(RTLIB::UO_F32, "__hexagon_unordsf2"); in HexagonTargetLowering()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp198 { RTLIB::UO_F32, "__unordsf2vfp", ISD::SETNE }, in ARMTargetLowering()
297 { RTLIB::UO_F32, "__aeabi_fcmpun", CallingConv::ARM_AAPCS, ISD::SETNE }, in ARMTargetLowering()