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Searched refs:Unconditional (Results 1 – 25 of 46) sorted by relevance

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/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.cpp31 HexagonMCChecker::Unconditional(Hexagon::NoRegister, false);
39 Defs[Hexagon::SA0].insert(Unconditional); // FIXME: define or change SA0? in init()
40 Defs[Hexagon::LC0].insert(Unconditional); in init()
43 Defs[Hexagon::SA1].insert(Unconditional); // FIXME: define or change SA0? in init()
44 Defs[Hexagon::LC1].insert(Unconditional); in init()
276 Unconditional = HEXAGON_PRESHUFFLE_PACKET_SIZE; in checkBranches() local
298 Unconditional = i; // Record the position of the unconditional branch. in checkBranches()
315 if (!hasConditional || Conditional > Unconditional) { in checkBranches()
414 if (PM.count(Unconditional)) { in checkRegisters()
DHexagonMCChecker.h83 static const PredSense Unconditional; variable
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.cpp37 HexagonMCChecker::Unconditional(Hexagon::NoRegister, false);
46 Defs[Hexagon::SA0].insert(Unconditional); // FIXME: define or change SA0? in init()
47 Defs[Hexagon::LC0].insert(Unconditional); in init()
50 Defs[Hexagon::SA1].insert(Unconditional); // FIXME: define or change SA0? in init()
51 Defs[Hexagon::LC1].insert(Unconditional); in init()
593 if (PM.count(Unconditional)) { in checkRegisters()
DHexagonMCChecker.h45 static const PredSense Unconditional; variable
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Darm64-branch.txt4 # Unconditional branch (register) instructions.
/external/deqp/doc/testspecs/GLES2/
Dfunctional.shaders.discard.txt25 + Unconditional discard
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-branch.txt4 # Unconditional branch (register) instructions.
/external/deqp/doc/testspecs/GLES3/
Dfunctional.shaders.fragdepth.txt26 - Unconditional write
/external/llvm/test/MC/AArch64/
Darm64-branch-encoding.s6 ; Unconditional branch (register) instructions.
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Darm64-branch-encoding.s6 ; Unconditional branch (register) instructions.
/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Dbranch-opt.ll269 ; Unconditional branches to the block after a contracted block should be
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/
DARCInstrInfo.td324 // Unconditional branch.
359 // Unconditional Jump.
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrControl.td40 // Unconditional branches.
/external/llvm/lib/Target/X86/
DX86InstrControl.td71 // Unconditional branches.
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips16InstrInfo.td605 // Purpose: Unconditional Branch (Extended)
612 // Purpose: Unconditional Branch
1360 // Unconditional branch
/external/llvm/lib/Target/Mips/
DMips16InstrInfo.td605 // Purpose: Unconditional Branch (Extended)
612 // Purpose: Unconditional Branch
1354 // Unconditional branch
/external/icu/icu4j/main/tests/core/src/com/ibm/icu/dev/data/unicode/
DSpecialCasing.txt59 # Unconditional mappings
/external/icu/android_icu4j/src/main/tests/android/icu/dev/data/unicode/
DSpecialCasing.txt59 # Unconditional mappings
/external/icu/icu4c/source/data/unidata/
DSpecialCasing.txt59 # Unconditional mappings
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrControl.td61 // Unconditional branches.
/external/llvm/bindings/ocaml/llvm/
Dllvm.ml1121 Some (`Unconditional (successor llv 0))
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrInfo.td438 // Unconditional branch
/external/swiftshader/third_party/llvm-7.0/llvm/bindings/ocaml/llvm/
Dllvm.ml1110 Some (`Unconditional (successor llv 0))
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td83 // Unconditional branches. These are in fact simply variants of the
200 // Unconditional trap.
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md112 Unconditional branch to PC offset.
119 Unconditional branch to label.

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