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Searched refs:VAL32 (Results 1 – 3 of 3) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dcomplex-int-to-fp.ll34 ; CHECK: sshr.2s [[VAL32:v[0-9]+]], [[TMP]], #16
35 ; CHECK: sshll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
44 ; CHECK: and.8b [[VAL32:v[0-9]+]], v0, v[[MASK]]
45 ; CHECK: ushll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
55 ; CHECK: sshr.2s [[VAL32:v[0-9]+]], [[TMP]], #24
56 ; CHECK: sshll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
65 ; CHECK: and.8b [[VAL32:v[0-9]+]], v0, v[[MASK]]
66 ; CHECK: ushll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
93 ; CHECK: sshr.2s [[VAL32:v[0-9]+]], [[TMP]], #16
94 ; CHECK: scvtf.2s v0, [[VAL32]]
[all …]
/external/llvm/test/CodeGen/AArch64/
Dcomplex-int-to-fp.ll34 ; CHECK: sshr.2s [[VAL32:v[0-9]+]], [[TMP]], #16
35 ; CHECK: sshll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
44 ; CHECK: and.8b [[VAL32:v[0-9]+]], v0, v[[MASK]]
45 ; CHECK: ushll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
55 ; CHECK: sshr.2s [[VAL32:v[0-9]+]], [[TMP]], #24
56 ; CHECK: sshll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
65 ; CHECK: and.8b [[VAL32:v[0-9]+]], v0, v[[MASK]]
66 ; CHECK: ushll.2d [[VAL64:v[0-9]+]], [[VAL32]], #0
93 ; CHECK: sshr.2s [[VAL32:v[0-9]+]], [[TMP]], #16
94 ; CHECK: scvtf.2s v0, [[VAL32]]
[all …]
/external/libunwind/src/dwarf/
DGexpr.c45 #define VAL32 0x2 macro
59 [DW_OP_const4u] = OPND1 (VAL32),
60 [DW_OP_const4s] = OPND1 (VAL32),
106 [DW_OP_call4] = OPND1 (VAL32),
138 case 4: operand_type = VAL32; break; in read_operand()
159 case VAL32: in read_operand()