| /external/vixl/test/aarch32/config/ |
| D | cond-dt-drt-drd-drn-drm-float.json | 35 "Vceq", // VCEQ{<c>}{<q>}.<dt> {<Dd>}, <Dn>, <Dm> ; A2
36 // VCEQ{<c>}{<q>}.<dt> {<Dd>}, <Dn>, <Dm> ; T2
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | vicmp.ll | 4 ; Not-equal (ne) operations are implemented by VCEQ/VMVN. Less-than (lt/ult)
|
| D | vfcmp.ll | 5 ; une is implemented with VCEQ/VMVN
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| /external/llvm/test/CodeGen/ARM/ |
| D | vicmp.ll | 4 ; Not-equal (ne) operations are implemented by VCEQ/VMVN. Less-than (lt/ult)
|
| D | vfcmp.ll | 5 ; une is implemented with VCEQ/VMVN
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | vicmp.ll | 4 ; Not-equal (ne) operations are implemented by VCEQ/VMVN. Less-than (lt/ult)
|
| D | vfcmp.ll | 5 ; une is implemented with VCEQ/VMVN
|
| /external/arm-neon-tests/ |
| D | ref-rvct-neon-nofp16.txt | 1343 VCEQ/VCEQQ output:
1344 VCEQ/VCEQQ:0:result_uint8x8 [] = { 0, 0, 0, 0, 0, 0, ff, 0, }
1345 VCEQ/VCEQQ:1:result_uint16x4 [] = { 0, 0, ffff, 0, }
1346 VCEQ/VCEQQ:2:result_uint32x2 [] = { ffffffff, 0, }
1347 VCEQ/VCEQQ:3:result_uint8x8 [] = { 0, 0, 0, ff, 0, 0, 0, 0, }
1348 VCEQ/VCEQQ:4:result_uint16x4 [] = { 0, 0, ffff, 0, }
1349 VCEQ/VCEQQ:5:result_uint32x2 [] = { 0, ffffffff, }
1350 VCEQ/VCEQQ:6:result_uint8x16 [] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ff, 0, 0, 0, }
1351 VCEQ/VCEQQ:7:result_uint16x8 [] = { 0, 0, 0, 0, 0, 0, ffff, 0, }
1352 VCEQ/VCEQQ:8:result_uint32x4 [] = { 0, 0, ffffffff, 0, }
[all …]
|
| D | ref-rvct-neon.txt | 1435 VCEQ/VCEQQ output:
1436 VCEQ/VCEQQ:0:result_uint8x8 [] = { 0, 0, 0, 0, 0, 0, ff, 0, }
1437 VCEQ/VCEQQ:1:result_uint16x4 [] = { 0, 0, ffff, 0, }
1438 VCEQ/VCEQQ:2:result_uint32x2 [] = { ffffffff, 0, }
1439 VCEQ/VCEQQ:3:result_uint8x8 [] = { 0, 0, 0, ff, 0, 0, 0, 0, }
1440 VCEQ/VCEQQ:4:result_uint16x4 [] = { 0, 0, ffff, 0, }
1441 VCEQ/VCEQQ:5:result_uint32x2 [] = { 0, ffffffff, }
1442 VCEQ/VCEQQ:6:result_uint8x16 [] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ff, 0, 0, 0, }
1443 VCEQ/VCEQQ:7:result_uint16x8 [] = { 0, 0, 0, 0, 0, 0, ffff, 0, }
1444 VCEQ/VCEQQ:8:result_uint32x4 [] = { 0, 0, ffffffff, 0, }
[all …]
|
| D | ref-rvct-all.txt | 1435 VCEQ/VCEQQ output:
1436 VCEQ/VCEQQ:0:result_uint8x8 [] = { 0, 0, 0, 0, 0, 0, ff, 0, }
1437 VCEQ/VCEQQ:1:result_uint16x4 [] = { 0, 0, ffff, 0, }
1438 VCEQ/VCEQQ:2:result_uint32x2 [] = { ffffffff, 0, }
1439 VCEQ/VCEQQ:3:result_uint8x8 [] = { 0, 0, 0, ff, 0, 0, 0, 0, }
1440 VCEQ/VCEQQ:4:result_uint16x4 [] = { 0, 0, ffff, 0, }
1441 VCEQ/VCEQQ:5:result_uint32x2 [] = { 0, ffffffff, }
1442 VCEQ/VCEQQ:6:result_uint8x16 [] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ff, 0, 0, 0, }
1443 VCEQ/VCEQQ:7:result_uint16x8 [] = { 0, 0, 0, 0, 0, 0, ffff, 0, }
1444 VCEQ/VCEQQ:8:result_uint32x4 [] = { 0, 0, ffffffff, 0, }
[all …]
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMISelLowering.h | 97 VCEQ, // Vector compare equal. enumerator
|
| D | ARMISelLowering.cpp | 867 case ARMISD::VCEQ: return "ARMISD::VCEQ"; in getTargetNodeName()
3449 case ISD::SETEQ: Opc = ARMISD::VCEQ; break; in LowerVSETCC()
3486 case ISD::SETEQ: Opc = ARMISD::VCEQ; break; in LowerVSETCC()
3498 if (Opc == ARMISD::VCEQ) { in LowerVSETCC()
3538 case ARMISD::VCEQ: in LowerVSETCC()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 169 VCEQ, enumerator
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 96 VCEQ, // Vector compare equal. enumerator
|
| D | ARMScheduleSwift.td | 555 "VACLE", "VACLT", "VCEQ", "VCGE", "VCGT", "VCLE", "VCLT", "VRSHL",
|
| D | ARMISelLowering.cpp | 1171 case ARMISD::VCEQ: return "ARMISD::VCEQ"; in getTargetNodeName()
4896 case ISD::SETEQ: Opc = ARMISD::VCEQ; break; in LowerVSETCC()
4933 case ISD::SETEQ: Opc = ARMISD::VCEQ; break; in LowerVSETCC()
4945 if (Opc == ARMISD::VCEQ) { in LowerVSETCC()
4985 case ARMISD::VCEQ: in LowerVSETCC()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 221 VCEQ, enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 124 VCEQ, // Vector compare equal. enumerator
|
| D | ARMScheduleSwift.td | 572 "VCEQ", "VCGE", "VCGT", "VCLE", "VCLT", "VRSHL",
|
| D | ARMScheduleR52.td | 795 (instregex "(VCEQ|VCGE|VCGT|VCLE|VCLT|VCLZ|VCMP|VCMPE|VCNT)")>;
|
| D | ARMScheduleA57.td | 1009 (instregex "VCEQ", "VCGE", "VCGT", "VCLE", "VTST", "VCLT")>;
|
| /external/v8/src/arm/ |
| D | assembler-arm.cc | 4353 VCEQ, enumerator
4387 case VCEQ: in EncodeNeonBinOp()
4736 emit(EncodeNeonBinOp(VCEQ, size, dst, src1, src2)); in vceq()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZScheduleZ13.td | 1301 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1302 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| D | SystemZScheduleZ14.td | 1322 def : InstRW<[WLat2, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)?$")>;
1323 def : InstRW<[WLat3, WLat3, VecXsPm, NormalGr], (instregex "VCEQ(B|F|G|H)S$")>;
|
| /external/v8/src/s390/ |
| D | constants-s390.h | 515 V(vceq, VCEQ, 0xE7F8) /* type = VRR_B VECTOR COMPARE EQUAL */ \
|