/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 2454 SDValue ValOp = GetWidenedVector(ST->getValue()); in GenWidenVectorStores() local 2459 EVT ValVT = ValOp.getValueType(); in GenWidenVectorStores() 2475 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp, in GenWidenVectorStores() 2491 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp); in GenWidenVectorStores() 2522 SDValue ValOp = GetWidenedVector(ST->getValue()); in GenWidenVectorTruncStores() local 2526 EVT ValVT = ValOp.getValueType(); in GenWidenVectorTruncStores() 2530 assert(StVT.isVector() && ValOp.getValueType().isVector()); in GenWidenVectorTruncStores() 2531 assert(StVT.bitsLT(ValOp.getValueType())); in GenWidenVectorTruncStores() 2540 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, in GenWidenVectorTruncStores() 2549 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, in GenWidenVectorTruncStores()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 4058 SDValue ValOp = GetWidenedVector(ST->getValue()); in GenWidenVectorStores() local 4063 EVT ValVT = ValOp.getValueType(); in GenWidenVectorStores() 4080 ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp, in GenWidenVectorStores() 4095 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp); in GenWidenVectorStores() 4126 SDValue ValOp = GetWidenedVector(ST->getValue()); in GenWidenVectorTruncStores() local 4130 EVT ValVT = ValOp.getValueType(); in GenWidenVectorTruncStores() 4134 assert(StVT.isVector() && ValOp.getValueType().isVector()); in GenWidenVectorTruncStores() 4135 assert(StVT.bitsLT(ValOp.getValueType())); in GenWidenVectorTruncStores() 4144 ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, in GenWidenVectorTruncStores() 4153 ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, in GenWidenVectorTruncStores()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 3708 SDValue ValOp = GetWidenedVector(ST->getValue()); in GenWidenVectorStores() local 3713 EVT ValVT = ValOp.getValueType(); in GenWidenVectorStores() 3730 ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp, in GenWidenVectorStores() 3747 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp); in GenWidenVectorStores() 3782 SDValue ValOp = GetWidenedVector(ST->getValue()); in GenWidenVectorTruncStores() local 3786 EVT ValVT = ValOp.getValueType(); in GenWidenVectorTruncStores() 3790 assert(StVT.isVector() && ValOp.getValueType().isVector()); in GenWidenVectorTruncStores() 3791 assert(StVT.bitsLT(ValOp.getValueType())); in GenWidenVectorTruncStores() 3800 ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, in GenWidenVectorTruncStores() 3813 ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp, in GenWidenVectorTruncStores()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonConstPropagation.cpp | 2681 const MachineOperand &ValOp = MI.getOperand(TakeOp); in evaluateHexCondMove() local 2685 if (ValOp.isImm()) { in evaluateHexCondMove() 2686 int64_t V = ValOp.getImm(); in evaluateHexCondMove() 2694 if (ValOp.isReg()) { in evaluateHexCondMove() 2695 Register R(ValOp); in evaluateHexCondMove()
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D | HexagonSplitDouble.cpp | 644 MachineOperand &ValOp = Load ? MI->getOperand(0) in splitMemRef() local 647 UUPairMap::const_iterator F = PairMap.find(ValOp.getReg()); in splitMemRef()
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D | HexagonBitSimplify.cpp | 1922 MachineOperand &ValOp = MI->getOperand(2); in genStoreUpperHalf() local 1923 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf() 1933 ValOp.setReg(H.Reg); in genStoreUpperHalf() 1934 ValOp.setSubReg(H.Sub); in genStoreUpperHalf()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonBitSimplify.cpp | 1819 MachineOperand &ValOp = MI->getOperand(2); in genStoreUpperHalf() local 1820 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf() 1830 ValOp.setReg(H.Reg); in genStoreUpperHalf() 1831 ValOp.setSubReg(H.Sub); in genStoreUpperHalf()
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D | HexagonSplitDouble.cpp | 598 MachineOperand &ValOp = Load ? MI->getOperand(0) in splitMemRef() local 601 UUPairMap::const_iterator F = PairMap.find(ValOp.getReg()); in splitMemRef()
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/external/llvm/lib/Transforms/Scalar/ |
D | SROA.cpp | 743 Value *ValOp = SI.getValueOperand(); in visitStoreInst() local 744 if (ValOp == *U) in visitStoreInst() 750 uint64_t Size = DL.getTypeStoreSize(ValOp->getType()); in visitStoreInst() 768 assert((!SI.isSimple() || ValOp->getType()->isSingleValueType()) && in visitStoreInst() 770 handleLoadOrStore(ValOp->getType(), SI, Offset, Size, SI.isVolatile()); in visitStoreInst()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
D | SROA.cpp | 793 Value *ValOp = SI.getValueOperand(); in visitStoreInst() local 794 if (ValOp == *U) in visitStoreInst() 800 uint64_t Size = DL.getTypeStoreSize(ValOp->getType()); in visitStoreInst() 818 assert((!SI.isSimple() || ValOp->getType()->isSingleValueType()) && in visitStoreInst() 820 handleLoadOrStore(ValOp->getType(), SI, Offset, Size, SI.isVolatile()); in visitStoreInst()
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
D | SPUISelLowering.cpp | 2158 SDValue ValOp = Op.getOperand(1); in LowerINSERT_VECTOR_ELT() local 2162 EVT eltVT = ValOp.getValueType(); in LowerINSERT_VECTOR_ELT() 2184 DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, ValOp), in LowerINSERT_VECTOR_ELT()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.cpp | 13163 SDValue ValOp = N->getOperand(0); in PerformShiftCombine() local 13172 ValOp, BaseShAmt); in PerformShiftCombine() 13176 ValOp, BaseShAmt); in PerformShiftCombine() 13180 ValOp, BaseShAmt); in PerformShiftCombine() 13186 ValOp, BaseShAmt); in PerformShiftCombine() 13190 ValOp, BaseShAmt); in PerformShiftCombine() 13196 ValOp, BaseShAmt); in PerformShiftCombine() 13200 ValOp, BaseShAmt); in PerformShiftCombine() 13204 ValOp, BaseShAmt); in PerformShiftCombine()
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/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringMIPS32.cpp | 797 Operand *ValOp = IntrinsicCall->getArg(1); in genTargetHelperCallFor() local 798 assert(ValOp->getType() == IceType_i8); in genTargetHelperCallFor() 800 Context.insert<InstCast>(InstCast::Zext, ValExt, ValOp); in genTargetHelperCallFor()
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D | IceTargetLoweringARM32.cpp | 790 Operand *ValOp = IntrinsicCall->getArg(1); in genTargetHelperCallFor() local 791 assert(ValOp->getType() == IceType_i8); in genTargetHelperCallFor() 793 Context.insert<InstCast>(InstCast::Zext, ValExt, ValOp); in genTargetHelperCallFor()
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