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Searched refs:VecVT (Results 1 – 25 of 51) sorted by relevance

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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUISelDAGToDAG.cpp915 EVT VecVT = EVT::getVectorVT(*CurDAG->getContext(), in SelectSHLi64() local
923 VecOp0 = CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS, dl, VecVT, in SelectSHLi64()
926 SelMask = CurDAG->getMachineNode(SPU::FSMBIv2i64, dl, VecVT, SelMaskVal); in SelectSHLi64()
927 ZeroFill = CurDAG->getMachineNode(SPU::ILv2i64, dl, VecVT, in SelectSHLi64()
929 VecOp0 = CurDAG->getMachineNode(SPU::SELBv2i64, dl, VecVT, in SelectSHLi64()
940 CurDAG->getMachineNode(SPU::SHLQBYIv2i64, dl, VecVT, in SelectSHLi64()
947 CurDAG->getMachineNode(SPU::SHLQBIIv2i64, dl, VecVT, in SelectSHLi64()
961 CurDAG->getMachineNode(SPU::SHLQBYv2i64, dl, VecVT, in SelectSHLi64()
964 CurDAG->getMachineNode(SPU::SHLQBIv2i64, dl, VecVT, in SelectSHLi64()
983 EVT VecVT = EVT::getVectorVT(*CurDAG->getContext(), in SelectSRLi64() local
[all …]
DSPUISelLowering.cpp1836 EVT VecVT = V1.getValueType(); in LowerVECTOR_SHUFFLE() local
1837 EVT EltVT = VecVT.getVectorElementType(); in LowerVECTOR_SHUFFLE()
1842 unsigned MaxElts = VecVT.getVectorNumElements(); in LowerVECTOR_SHUFFLE()
2086 EVT VecVT = N.getValueType(); in LowerEXTRACT_VECTOR_ELT() local
2087 if (!VecVT.isSimple() || !VecVT.isVector()) { in LowerEXTRACT_VECTOR_ELT()
2108 vecShift = DAG.getNode(SPUISD::SHL_BYTES, dl, VecVT, N, Elt); in LowerEXTRACT_VECTOR_ELT()
2149 DAG.getNode(SPUISD::SHUFB, dl, VecVT, in LowerEXTRACT_VECTOR_ELT()
2676 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), in LowerTRUNCATE() local
2695 SDValue truncShuffle = DAG.getNode(SPUISD::SHUFB, dl, VecVT, in LowerTRUNCATE()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonTargetTransformInfo.cpp52 EVT VecVT = EVT::getEVT(VecTy); in isTypeForHVX() local
53 if (!VecVT.isSimple() || VecVT.getSizeInBits() <= 64) in isTypeForHVX()
55 if (ST.isHVXVectorType(VecVT.getSimpleVT())) in isTypeForHVX()
57 auto Action = TLI.getPreferredVectorAction(VecVT); in isTypeForHVX()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp300 EVT VecVT = N->getValueType(0); in ExpandOp_BUILD_VECTOR() local
301 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_BUILD_VECTOR()
306 assert(OldVT == VecVT.getVectorElementType() && in ExpandOp_BUILD_VECTOR()
329 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_BUILD_VECTOR()
340 EVT VecVT = N->getValueType(0); in ExpandOp_INSERT_VECTOR_ELT() local
341 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_INSERT_VECTOR_ELT()
348 assert(OldEVT == VecVT.getVectorElementType() && in ExpandOp_INSERT_VECTOR_ELT()
370 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_INSERT_VECTOR_ELT()
DLegalizeVectorTypes.cpp663 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_VECTOR_ELT() local
664 EVT EltVT = VecVT.getVectorElementType(); in SplitVecRes_INSERT_VECTOR_ELT()
665 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); in SplitVecRes_INSERT_VECTOR_ELT()
672 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext()); in SplitVecRes_INSERT_VECTOR_ELT()
1071 EVT VecVT = Vec.getValueType(); in SplitVecOp_EXTRACT_VECTOR_ELT() local
1075 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!"); in SplitVecOp_EXTRACT_VECTOR_ELT()
1090 EVT EltVT = VecVT.getVectorElementType(); in SplitVecOp_EXTRACT_VECTOR_ELT()
1092 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); in SplitVecOp_EXTRACT_VECTOR_ELT()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp382 EVT VecVT = N->getValueType(0); in ExpandOp_BUILD_VECTOR() local
383 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_BUILD_VECTOR()
388 assert(OldVT == VecVT.getVectorElementType() && in ExpandOp_BUILD_VECTOR()
411 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_BUILD_VECTOR()
422 EVT VecVT = N->getValueType(0); in ExpandOp_INSERT_VECTOR_ELT() local
423 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_INSERT_VECTOR_ELT()
430 assert(OldEVT == VecVT.getVectorElementType() && in ExpandOp_INSERT_VECTOR_ELT()
453 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_INSERT_VECTOR_ELT()
DLegalizeVectorTypes.cpp853 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_SUBVECTOR() local
854 EVT VecElemVT = VecVT.getVectorElementType(); in SplitVecRes_INSERT_SUBVECTOR()
855 unsigned VecElems = VecVT.getVectorNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
875 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); in SplitVecRes_INSERT_SUBVECTOR()
881 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext()); in SplitVecRes_INSERT_SUBVECTOR()
1004 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_VECTOR_ELT() local
1005 EVT EltVT = VecVT.getVectorElementType(); in SplitVecRes_INSERT_VECTOR_ELT()
1006 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); in SplitVecRes_INSERT_VECTOR_ELT()
1013 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext()); in SplitVecRes_INSERT_VECTOR_ELT()
1618 EVT VecVT = Vec.getValueType(); in SplitVecOp_EXTRACT_VECTOR_ELT() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp377 EVT VecVT = N->getValueType(0); in ExpandOp_BUILD_VECTOR() local
378 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_BUILD_VECTOR()
383 assert(OldVT == VecVT.getVectorElementType() && in ExpandOp_BUILD_VECTOR()
404 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_BUILD_VECTOR()
415 EVT VecVT = N->getValueType(0); in ExpandOp_INSERT_VECTOR_ELT() local
416 unsigned NumElts = VecVT.getVectorNumElements(); in ExpandOp_INSERT_VECTOR_ELT()
423 assert(OldEVT == VecVT.getVectorElementType() && in ExpandOp_INSERT_VECTOR_ELT()
446 return DAG.getNode(ISD::BITCAST, dl, VecVT, NewVec); in ExpandOp_INSERT_VECTOR_ELT()
DLegalizeVectorTypes.cpp929 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_SUBVECTOR() local
930 unsigned VecElems = VecVT.getVectorNumElements(); in SplitVecRes_INSERT_SUBVECTOR()
950 SDValue StackPtr = DAG.CreateStackTemporary(VecVT); in SplitVecRes_INSERT_SUBVECTOR()
955 SDValue SubVecPtr = TLI.getVectorElementPointer(DAG, StackPtr, VecVT, Idx); in SplitVecRes_INSERT_SUBVECTOR()
956 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext()); in SplitVecRes_INSERT_SUBVECTOR()
1133 EVT VecVT = Vec.getValueType(); in SplitVecRes_INSERT_VECTOR_ELT() local
1134 EVT EltVT = VecVT.getVectorElementType(); in SplitVecRes_INSERT_VECTOR_ELT()
1135 if (VecVT.getScalarSizeInBits() < 8) { in SplitVecRes_INSERT_VECTOR_ELT()
1137 VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, in SplitVecRes_INSERT_VECTOR_ELT()
1138 VecVT.getVectorNumElements()); in SplitVecRes_INSERT_VECTOR_ELT()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp3743 static unsigned int getVCmpInst(MVT VecVT, ISD::CondCode CC, in getVCmpInst() argument
3748 if (VecVT.isFloatingPoint()) { in getVCmpInst()
3771 if (VecVT == MVT::v4f32) in getVCmpInst()
3773 else if (VecVT == MVT::v2f64) in getVCmpInst()
3778 if (VecVT == MVT::v4f32) in getVCmpInst()
3780 else if (VecVT == MVT::v2f64) in getVCmpInst()
3785 if (VecVT == MVT::v4f32) in getVCmpInst()
3787 else if (VecVT == MVT::v2f64) in getVCmpInst()
3815 if (VecVT == MVT::v16i8) in getVCmpInst()
3817 else if (VecVT == MVT::v8i16) in getVCmpInst()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2152 static unsigned int getVCmpInst(MVT VecVT, ISD::CondCode CC, in getVCmpInst() argument
2157 if (VecVT.isFloatingPoint()) { in getVCmpInst()
2180 if (VecVT == MVT::v4f32) in getVCmpInst()
2182 else if (VecVT == MVT::v2f64) in getVCmpInst()
2187 if (VecVT == MVT::v4f32) in getVCmpInst()
2189 else if (VecVT == MVT::v2f64) in getVCmpInst()
2194 if (VecVT == MVT::v4f32) in getVCmpInst()
2196 else if (VecVT == MVT::v2f64) in getVCmpInst()
2224 if (VecVT == MVT::v16i8) in getVCmpInst()
2226 else if (VecVT == MVT::v8i16) in getVCmpInst()
[all …]
/external/llvm/lib/Target/NVPTX/
DNVPTXISelLowering.cpp1568 EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, VecSize); in LowerCall() local
1605 Ofst += DL.getTypeAllocSize(VecVT.getTypeForEVT(F->getContext())); in LowerCall()
2233 EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, 2); in LowerFormalArguments() local
2235 VecVT.getTypeForEVT(F->getContext()), llvm::ADDRESS_SPACE_PARAM)); in LowerFormalArguments()
2237 VecVT, dl, Root, Arg, MachinePointerInfo(SrcValue), false, false, in LowerFormalArguments()
2239 DL.getABITypeAlignment(VecVT.getTypeForEVT(F->getContext()))); in LowerFormalArguments()
2271 EVT VecVT = EVT::getVectorVT(F->getContext(), EltVT, VecSize); in LowerFormalArguments() local
2275 PointerType::get(VecVT.getTypeForEVT(F->getContext()), in LowerFormalArguments()
2280 VecVT, dl, Root, SrcAddr, MachinePointerInfo(SrcValue), false, in LowerFormalArguments()
2282 DL.getABITypeAlignment(VecVT.getTypeForEVT(F->getContext()))); in LowerFormalArguments()
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp4041 MVT VecVT = MVT::getVectorVT(MVT::getIntegerVT(BitsPerElement), in tryBuildVectorReplicate() local
4043 SDValue Op = DAG.getNode(SystemZISD::REPLICATE, DL, VecVT, in tryBuildVectorReplicate()
4058 MVT VecVT = MVT::getVectorVT(MVT::getIntegerVT(BitsPerElement), in tryBuildVectorReplicate() local
4060 SDValue Op = DAG.getNode(SystemZISD::ROTATE_MASK, DL, VecVT, in tryBuildVectorReplicate()
4390 EVT VecVT = Op0.getValueType(); in lowerEXTRACT_VECTOR_ELT() local
4395 unsigned Mask = VecVT.getVectorNumElements() - 1; in lowerEXTRACT_VECTOR_ELT()
4402 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); in lowerEXTRACT_VECTOR_ELT()
4715 EVT VecVT, SDValue Op, in combineExtract() argument
4722 unsigned BytesPerElement = VecVT.getVectorElementType().getStoreSize(); in combineExtract()
4807 if (Op.getValueType() != VecVT) { in combineExtract()
[all …]
DSystemZISelLowering.h543 SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
/external/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp2539 EVT VecVT = Vec0.getValueType(); in LowerCONCAT_VECTORS() local
2540 unsigned Width = VecVT.getSizeInBits(); in LowerCONCAT_VECTORS()
2543 MVT ST = VecVT.getSimpleVT(); in LowerCONCAT_VECTORS()
2600 EVT VecVT = Vec.getValueType(); in LowerEXTRACT_VECTOR() local
2601 EVT EltVT = VecVT.getVectorElementType(); in LowerEXTRACT_VECTOR()
2616 MVT SVT = VecVT.getSimpleVT(); in LowerEXTRACT_VECTOR()
2635 } else if (VecVT.getSizeInBits() == 32) { in LowerEXTRACT_VECTOR()
2656 if (VecVT.getSizeInBits() == 32) { in LowerEXTRACT_VECTOR()
2675 EVT VecVT = Vec.getValueType(); in LowerINSERT_VECTOR() local
2676 EVT EltVT = VecVT.getVectorElementType(); in LowerINSERT_VECTOR()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp4303 MVT VecVT = MVT::getVectorVT(MVT::getIntegerVT(BitsPerElement), in tryBuildVectorReplicate() local
4306 SystemZISD::REPLICATE, DL, VecVT, in tryBuildVectorReplicate()
4321 MVT VecVT = MVT::getVectorVT(MVT::getIntegerVT(BitsPerElement), in tryBuildVectorReplicate() local
4324 SystemZISD::ROTATE_MASK, DL, VecVT, in tryBuildVectorReplicate()
4679 EVT VecVT = Op0.getValueType(); in lowerEXTRACT_VECTOR_ELT() local
4684 unsigned Mask = VecVT.getVectorNumElements() - 1; in lowerEXTRACT_VECTOR_ELT()
4691 MVT IntVecVT = MVT::getVectorVT(IntVT, VecVT.getVectorNumElements()); in lowerEXTRACT_VECTOR_ELT()
5109 EVT VecVT, SDValue Op, in combineExtract() argument
5116 unsigned BytesPerElement = VecVT.getVectorElementType().getStoreSize(); in combineExtract()
5202 if (Op.getValueType() != VecVT) { in combineExtract()
[all …]
DSystemZISelLowering.h591 SDValue combineExtract(const SDLoc &DL, EVT ElemVT, EVT VecVT, SDValue OrigOp,
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h148 bool aggressivelyPreferBuildVectorSources(EVT VecVT) const override;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.h175 bool aggressivelyPreferBuildVectorSources(EVT VecVT) const override;
DR600ISelLowering.cpp695 EVT VecVT = Vector.getValueType(); in vectorToVerticalVector() local
696 EVT EltVT = VecVT.getVectorElementType(); in vectorToVerticalVector()
699 for (unsigned i = 0, e = VecVT.getVectorNumElements(); i != e; ++i) { in vectorToVerticalVector()
705 return DAG.getNode(AMDGPUISD::BUILD_VERTICAL_VECTOR, DL, VecVT, Args); in vectorToVerticalVector()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp2809 MVT VecVT = MVT::Other; in LowerFormalArguments() local
2814 VecVT = MVT::v16f32; in LowerFormalArguments()
2816 VecVT = MVT::v8f32; in LowerFormalArguments()
2818 VecVT = MVT::v4f32; in LowerFormalArguments()
2824 if (VecVT != MVT::Other) in LowerFormalArguments()
2825 RegParmTypes.push_back(VecVT); in LowerFormalArguments()
4306 MVT VecVT = N->getOperand(0).getSimpleValueType(); in getExtractVEXTRACTImmediate() local
4307 MVT ElVT = VecVT.getVectorElementType(); in getExtractVEXTRACTImmediate()
4321 MVT VecVT = N->getSimpleValueType(0); in getInsertVINSERTImmediate() local
4322 MVT ElVT = VecVT.getVectorElementType(); in getInsertVINSERTImmediate()
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp3757 EVT VecVT; in LowerFCOPYSIGN() local
3763 VecVT = (VT == MVT::v2f32 ? MVT::v2i32 : MVT::v4i32); in LowerFCOPYSIGN()
3767 VecVal1 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT, in LowerFCOPYSIGN()
3768 DAG.getUNDEF(VecVT), In1); in LowerFCOPYSIGN()
3769 VecVal2 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT, in LowerFCOPYSIGN()
3770 DAG.getUNDEF(VecVT), In2); in LowerFCOPYSIGN()
3772 VecVal1 = DAG.getNode(ISD::BITCAST, DL, VecVT, In1); in LowerFCOPYSIGN()
3773 VecVal2 = DAG.getNode(ISD::BITCAST, DL, VecVT, In2); in LowerFCOPYSIGN()
3777 VecVT = MVT::v2i64; in LowerFCOPYSIGN()
3785 VecVal1 = DAG.getTargetInsertSubreg(AArch64::dsub, DL, VecVT, in LowerFCOPYSIGN()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelDAGToDAG.cpp2702 EVT VecVT = N->getValueType(0); in Select() local
2703 EVT EltVT = VecVT.getVectorElementType(); in Select()
2704 unsigned NumElts = VecVT.getVectorNumElements(); in Select()
2707 return PairDRegs(VecVT, N->getOperand(0), N->getOperand(1)); in Select()
2711 return PairSRegs(VecVT, N->getOperand(0), N->getOperand(1)); in Select()
2713 return QuadSRegs(VecVT, N->getOperand(0), N->getOperand(1), in Select()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86ISelLowering.cpp3278 MVT VecVT = MVT::Other; in LowerFormalArguments() local
3283 VecVT = MVT::v16f32; in LowerFormalArguments()
3285 VecVT = MVT::v8f32; in LowerFormalArguments()
3287 VecVT = MVT::v4f32; in LowerFormalArguments()
3293 if (VecVT != MVT::Other) in LowerFormalArguments()
3294 RegParmTypes.push_back(VecVT); in LowerFormalArguments()
6920 MVT VecVT = MVT::getVectorVT(VecSVT, VT.getSizeInBits() / LoadSize); in EltsFromConsecutiveLoads() local
6921 if (TLI.isTypeLegal(VecVT)) { in EltsFromConsecutiveLoads()
6922 SDVTList Tys = DAG.getVTList(VecVT, MVT::Other); in EltsFromConsecutiveLoads()
15280 MVT VecVT = Vec.getSimpleValueType(); in ExtractBitFromMaskVector() local
[all …]
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp3126 EVT VecVT = N->getValueType(0); in Select() local
3127 EVT EltVT = VecVT.getVectorElementType(); in Select()
3128 unsigned NumElts = VecVT.getVectorNumElements(); in Select()
3132 N, createDRegPairNode(VecVT, N->getOperand(0), N->getOperand(1))); in Select()
3138 N, createSRegPairNode(VecVT, N->getOperand(0), N->getOperand(1))); in Select()
3143 createQuadSRegsNode(VecVT, N->getOperand(0), N->getOperand(1), in Select()

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