Searched refs:WriteResourceID (Results 1 – 16 of 16) sorted by relevance
| /external/llvm/include/llvm/MC/ |
| D | MCSchedule.h | 71 unsigned WriteResourceID; member
74 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
88 unsigned WriteResourceID; member
92 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
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| D | MCSubtargetInfo.h | 148 if (!I->WriteResourceID || I->WriteResourceID == WriteResID) { in getReadAdvanceCycles()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCSchedule.h | 80 uint16_t WriteResourceID; member
83 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
97 unsigned WriteResourceID; member
101 return UseIdx == Other.UseIdx && WriteResourceID == Other.WriteResourceID
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| D | MCSubtargetInfo.h | 149 if (!I->WriteResourceID || I->WriteResourceID == WriteResID) { in getReadAdvanceCycles()
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| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
| D | InstrBuilder.cpp | 203 Write.SClassOrWriteResourceID = WLE.WriteResourceID; in populateWrites()
234 Write.SClassOrWriteResourceID = WLE.WriteResourceID; in populateWrites()
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| /external/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 909 WLEntry.WriteResourceID = WriteID; in GenSchedClassTables()
984 RAEntry.WriteResourceID = W; in GenSchedClassTables()
1080 << format("%2d", WLEntry.WriteResourceID) << "}"; in EmitSchedClassTables()
1096 << format("%2d", RAEntry.WriteResourceID) << ", " in EmitSchedClassTables()
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| /external/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 193 unsigned WriteID = WLEntry->WriteResourceID; in computeOperandLatency()
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | SubtargetEmitter.cpp | 1089 WLEntry.WriteResourceID = WriteID; in GenSchedClassTables()
1181 RAEntry.WriteResourceID = W; in GenSchedClassTables()
1277 << format("%2d", WLEntry.WriteResourceID) << "}"; in EmitSchedClassTables()
1293 << format("%2d", RAEntry.WriteResourceID) << ", " in EmitSchedClassTables()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 224 unsigned WriteID = WLEntry->WriteResourceID; in computeOperandLatency()
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| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
| D | Analysis.cpp | 471 OS << " (WriteResourceID " << Entry->WriteResourceID << ")"; in printSchedClassDescHtml()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedA57.td | 68 // AArch64WriteLatencyTable with a WriteResourceID of 0, breaking
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedA57.td | 70 // AArch64WriteLatencyTable with a WriteResourceID of 0, breaking
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 245 // {Cycles, WriteResourceID}
267 // {UseIdx, WriteResourceID, Cycles}
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenSubtargetInfo.inc | 1072 // {Cycles, WriteResourceID}
1390 // {UseIdx, WriteResourceID, Cycles}
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenSubtargetInfo.inc | 8267 // {Cycles, WriteResourceID}
10385 // {UseIdx, WriteResourceID, Cycles}
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
| D | X86GenSubtargetInfo.inc | 4558 // {Cycles, WriteResourceID}
4681 // {UseIdx, WriteResourceID, Cycles}
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