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/external/libxaac/decoder/armv8/
Dixheaacd_no_lap1.s51 SUB X6, X5, #1
52 LSL X6, X6, #2
53 ADD X6, X6, X0
55 SUB X6, X6, #12
61 LD1 {V0.4S}, [X6], X8
64 LD1 {V6.4S}, [X6], X8
78 LD1 {V0.4S}, [X6], X8
92 LD1 {V6.4S}, [X6], X8
Dixheaacd_sbr_imdct_using_fft.s79 MOV X6 , X2
116 ADD X6, X6, X12, LSL #3
117 LD2 {V0.S, V1.S}[1], [X6] , X1
118 ADD X6, X6, X1
119 LD2 {V4.S, V5.S}[1], [X6] , X1
120 SUB X6, X6, X1, LSL #1
121 LD2 {V2.S, V3.S}[1], [X6] , X1
122 ADD X6, X6, X1
123 LD2 {V6.S, V7.S}[1], [X6], X1
124 SUB X6, X6, X1, LSL #2
[all …]
Dixheaacd_imdct_using_fft.s63 ADD X6, X0, X29
88 MOv X4, X6
94 MOv X4, X6
109 MOv X6 , X2
146 ADD X6, X6, X12, LSL #3
147 LD2 {v0.S, v1.S}[1], [X6] , X1
148 ADD X6, X6, X1
149 LD2 {v4.S, v5.S}[1], [X6] , X1
150 SUB X6, X6, X1, LSL #1
151 LD2 {v2.S, v3.S}[1], [X6] , X1
[all …]
Dixheaacd_overlap_add1.s85 LSL X4, X6, #1
87 LSL X9, X6, #1
93 ADD X6, X6, X2
160 ST1 {V18.H}[0], [X6], X9
162 ST1 {V18.H}[1], [X6], X9
164 ST1 {V18.H}[2], [X6], X9
166 ST1 {V18.H}[3], [X6], X9
220 ST1 {V18.H}[0], [X6], X9
222 ST1 {V18.H}[1], [X6], X9
224 ST1 {V18.H}[2], [X6], X9
[all …]
/external/llvm/test/FileCheck/
Dcheck-dag-xfails.txt6 ; RUN: not FileCheck -check-prefix=X6 -input-file %s %s
79 ; X6: __x6
80 ; X6-DAG: add [[REG1:r[0-9]+]], r1, r2
81 ; X6-DAG: add [[REG2:r[0-9]+]], r3, r4
82 ; X6-NOT: not
83 ; X6-DAG: mul r5, [[REG1]], [[REG2]]
84 ; X6-DAG: mul r6, [[REG1]], [[REG2]]
85 ; X6: __x6
/external/swiftshader/third_party/llvm-7.0/llvm/test/FileCheck/
Dcheck-dag-xfails.txt6 ; RUN: not FileCheck -check-prefix=X6 -input-file %s %s
79 ; X6: __x6
80 ; X6-DAG: add [[REG1:r[0-9]+]], r1, r2
81 ; X6-DAG: add [[REG2:r[0-9]+]], r3, r4
82 ; X6-NOT: not
83 ; X6-DAG: mul r5, [[REG1]], [[REG2]]
84 ; X6-DAG: mul r6, [[REG1]], [[REG2]]
85 ; X6: __x6
/external/clang/test/CXX/except/except.spec/
Dp14-ir.cpp46 struct X6 { struct
47 X6() throw();
54 struct X8 : X6 { };
55 struct X9 : X6, X7 { };
/external/clang/test/CXX/expr/expr.unary/expr.new/
Dp20.cpp98 struct X6 { struct
99 X6();
111 new X6<3>; // expected-note 2{{instantiation}} in test_X6() argument
/external/clang/test/SemaTemplate/
Dconstructor-template.cpp110 struct X6 { struct
111 template<typename T> X6(T);
115 X5<X6> tf; in test_X5_X6()
116 X5<X6> tf2(tf); in test_X5_X6()
Ddefault-arguments.cpp120 struct X6 {}; struct
122 X6<int> x6a;
123 X6<long> x6b; // expected-note{{while checking a default template argument}}
124 X6<long, X5b> x6c;
Dinstantiate-function-1.cpp62 template<typename T, typename U, typename V> struct X6 { struct
83 template struct X6<ConvertibleToInt, float, char>; variable
84 template struct X6<bool, int, int*>; // expected-note{{instantiation}} variable
Dtemp_explicit.cpp104 struct X6 { struct
110 template struct X6::Inner; // expected-error{{non-templated}} argument
/external/clang/test/CXX/temp/temp.decls/temp.variadic/
Dmulti-level-substitution.cpp194 struct X6 { struct
209 static_assert(X6<unsigned char, int>().f1<A, B>(255, 1) == 12, "");
210 static_assert(X6<int, int>().f2(3, 4, 0, 0) == 34, "");
211 …static_assert(X6<int, int>().f2(3, 4, 0, 1) == 34, ""); // expected-error {{constant expression}} …
212 static_assert(X6<int, int>::Inner<int, int>().f(1, 2, 3, 4, 5, 6) == 102, "");
/external/clang/test/CodeGen/
Doverride-layout.c63 struct PACKED X6 { long double a; char b; }; argument
65 void use_X6() { struct X6 x6; x6.b = sizeof(struct X6); }; in use_X6()
/external/deqp-deps/glslang/Test/
Dpreprocessor.function_macro.vert8 #define REALLY_LONG_MACRO_NAME_WITH_MANY_PARAMETERS(X1, X2, X3, X4, X5, X6, X7,\
9 X8, X9, X10, X11, X12) X1+X2+X3+X4+X5+X6+X7+X8+X9+X10+X11+X12
/external/boringssl/src/crypto/fipsmodule/md4/
Dmd4.c139 uint32_t X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15; in md4_block_data_order() local
166 X6 = l; in md4_block_data_order()
170 R0(C, D, A, B, X6, 11, 0); in md4_block_data_order()
206 R1(D, A, B, C, X6, 5, 0x5A827999L); in md4_block_data_order()
220 R2(C, D, A, B, X6, 11, 0x6ED9EBA1L); in md4_block_data_order()
/external/clang/test/SemaCXX/
Dbool-compare.cpp179 template<typename T, typename U, typename V> struct X6 { struct
203 template struct X6<ConvertibleToInt, float, char>; argument
204 template struct X6<bool, int, int*>; // expected-note{{instantiation}} variable
Dnew-delete.cpp183 class X6 { class
193 class X8 : public X6, public X7 {
/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td57 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
59 CCIfType<[i64], CCIfSplit<CCAssignToRegWithShadow<[X0, X2, X4, X6],
65 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
102 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
103 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
146 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
149 CCIfSplit<CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6],
154 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
214 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
215 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64CallingConvention.td61 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
63 CCIfType<[i64], CCIfSplit<CCAssignToRegWithShadow<[X0, X2, X4, X6],
69 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
108 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
109 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
160 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
163 CCIfSplit<CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6],
168 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
229 [X0, X1, X2, X3, X4, X5, X6, X7]>>,
230 CCIfType<[i64], CCAssignToRegWithShadow<[X0, X1, X2, X3, X4, X5, X6, X7],
/external/llvm/lib/LibDriver/
DLibDriver.cpp43 #define OPTION(X1, X2, ID, KIND, GROUP, ALIAS, X6, X7, X8, X9, X10) \ argument
46 OPT_##GROUP, OPT_##ALIAS, X6 \
/external/clang/test/ASTMerge/Inputs/
Dclass-template1.cpp20 struct X6;
Dclass-template2.cpp20 struct X6;
/external/llvm/lib/Target/PowerPC/
DPPCCallingConv.td54 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>,
55 CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
100 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6, X7, X8, X9, X10]>>,
115 CCIfType<[i64], CCAssignToReg<[X3, X4, X5, X6]>>,
116 CCIfType<[i128], CCAssignToReg<[X3, X4, X5, X6]>>,
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenCallingConv.inc140 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…
151 AArch64::X0, AArch64::X2, AArch64::X4, AArch64::X6
176 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…
384 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…
395 AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6
420 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…
860 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…
870 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…
969 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…
979 …AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64…

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