Home
last modified time | relevance | path

Searched refs:XCHAL_ICACHE_SIZE (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/xtensa/include/asm/
Dcacheasm.h16 #define ICACHE_WAY_SIZE (XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS)
92 #if XCHAL_ICACHE_LINE_LOCKABLE && XCHAL_ICACHE_SIZE
93 __loop_cache_all \ar \at iiu XCHAL_ICACHE_SIZE XCHAL_ICACHE_LINEWIDTH
129 #if XCHAL_ICACHE_SIZE
167 #if XCHAL_ICACHE_SIZE
204 #if XCHAL_ICACHE_SIZE
/external/u-boot/arch/xtensa/include/asm/arch-dc232b/
Dcore.h124 #define XCHAL_ICACHE_SIZE 16384 /* I-cache size in bytes or 0 */ macro
/external/u-boot/arch/xtensa/include/asm/arch-dc233c/
Dcore.h143 #define XCHAL_ICACHE_SIZE 16384 /* I-cache size in bytes or 0 */ macro
/external/u-boot/arch/xtensa/include/asm/arch-de212/
Dcore.h191 #define XCHAL_ICACHE_SIZE 8192 /* I-cache size in bytes or 0 */ macro