/external/mesa3d/src/mesa/x86/ |
D | sse_xform2.S | 82 MOVSS( S(0), XMM3 ) /* ox */ 83 SHUFPS( CONST(0x0), XMM3, XMM3 ) /* ox | ox | ox | ox */ 84 MULPS( XMM0, XMM3 ) /* ox*m3 | ox*m2 | ox*m1 | ox*m0 */ 89 ADDPS( XMM4, XMM3 ) 90 ADDPS( XMM2, XMM3 ) 91 MOVAPS( XMM3, D(0) ) 196 MOVSS ( M(14), XMM3 ) /* - | - | - | m14 */ 205 MOVSS ( XMM3, D(2) ) /* -> D(2) */ 254 MOVSS ( M(14), XMM3 ) /* m14 */ 262 MOVSS( XMM3, D(2) ) /* ->D(2) */ [all …]
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D | sse_normal.S | 151 MOVSS ( M(6), XMM3 ) /* m6 */ 152 UNPCKLPS( XMM3, XMM2 ) /* m6 | m2 */ 162 MOVSS ( S(0), XMM3 ) /* ux */ 163 SHUFPS ( CONST(0x0), XMM3, XMM3 ) /* ux | ux */ 164 MULPS ( XMM0, XMM3 ) /* ux*m4 | ux*m0 */ 172 ADDPS ( XMM4, XMM3 ) 173 ADDPS ( XMM5, XMM3 ) 174 MOVLPS ( XMM3, D(0) ) 176 MOVSS ( M(10), XMM3 ) /* m10 */ 177 MULSS ( ARG_SCALE, XMM3 ) /* m10*scale */ [all …]
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D | sse_xform3.S | 80 MOVAPS ( REGOFF(48, EDX), XMM3 ) /* m12 | m13 | m14 | m15 */ 98 ADDPS ( XMM3, XMM4 ) 208 MOVSS ( M(10), XMM3 ) /* - | - | - | m10 */ 220 MULSS ( XMM3, XMM0 ) /* sz*m10 */ 273 MOVSS ( M(10), XMM3 ) /* m10 */ 288 MULSS ( XMM3, XMM0 ) /* oz*m10 */ 348 MOVSS ( S(0), XMM3 ) /* ox */ 349 SHUFPS ( CONST(0x0), XMM3, XMM3 ) /* ox | ox */ 350 MULPS ( XMM0, XMM3 ) /* ox*m1 | ox*m0 */ 355 ADDPS ( XMM4, XMM3 ) [all …]
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D | sse_xform4.S | 90 MOVSS( SRC(3), XMM3 ) /* ow */ 91 SHUFPS( CONST(0x0), XMM3, XMM3 ) /* ow | ow | ow | ow */ 92 MULPS( XMM7, XMM3 ) /* ow*m15 | ow*m14 | ow*m13 | ow*m12 */ 96 ADDPS( XMM3, XMM0 ) /* ox*m3+oy*m7+oz*m11+ow*m15 | ... */ 146 MOVAPS( MAT(12), XMM3 ) /* m15 | m14 | m13 | m12 */ 164 MULPS( XMM3, XMM7 ) /* ow*m15 | ow*m14 | ow*m13 | ow*m12 */
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D | sse_xform1.S | 189 MOVSS( M(14), XMM3 ) /* m14 */ 199 MOVSS( XMM3, D(2) ) 253 MOVSS( S(0), XMM3 ) /* ox */ 254 MULSS( XMM1, XMM3 ) /* ox*m0 */ 255 MOVSS( XMM3, D(0) ) /* ox*m0->D(0) */ 366 MOVSS( S(0), XMM3 ) /* ox */ 367 MULSS( XMM0, XMM3 ) /* ox*m0 */ 368 ADDSS( XMM1, XMM3 ) /* ox*m0+m12 */ 369 MOVSS( XMM3, D(0) )
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/external/llvm/lib/Target/X86/ |
D | X86CallingConv.td | 53 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3 57 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 112 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3. 114 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 140 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3. 142 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 206 // XMM0, XMM1, XMM2 and XMM3 can be used to return FP values. 207 CCIfType<[f32], CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>, 208 CCIfType<[f64], CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>, 209 CCIfType<[f128], CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86CallingConv.td | 47 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]; 53 let XMM = [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, 233 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3 237 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 293 // Vector types are returned in XMM0,XMM1,XMMM2 and XMM3. 295 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 321 // Floating Point types are returned in XMM0,XMM1,XMMM2 and XMM3. 323 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 357 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>, 393 // XMM0, XMM1, XMM2 and XMM3 can be used to return FP values. [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86CallingConv.td | 37 // Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3 41 CCAssignToReg<[XMM0,XMM1,XMM2,XMM3]>>, 159 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>>>, 201 [XMM0, XMM1, XMM2, XMM3]>>, 207 [XMM1, XMM2, XMM3]>>>>, 210 [XMM0, XMM1, XMM2, XMM3]>>, 214 CCAssignToRegWithShadow<[XMM0, XMM1, XMM2, XMM3], 237 CCAssignToReg<[XMM1, XMM2, XMM3, XMM4, XMM5, XMM6]>>> 274 CCAssignToReg<[XMM0, XMM1, XMM2, XMM3]>>>,
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D | X86InstrControl.td | 143 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, 182 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, 218 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7, 250 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, EFLAGS], 283 XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, EFLAGS],
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D | X86GenCallingConv.inc | 227 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 548 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 653 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6 708 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 723 X86::XMM1, X86::XMM2, X86::XMM3 738 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 755 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 854 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
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D | X86GenRegisterInfo.inc | 150 XMM3 = 131, 379 const unsigned XMM3_Overlaps[] = { X86::XMM3, X86::YMM3, 0 }; 395 const unsigned YMM3_Overlaps[] = { X86::YMM3, X86::XMM3, 0 }; 478 const unsigned YMM3_SubRegsSet[] = { X86::XMM3, 0 }; 696 { "XMM3", XMM3_Overlaps, XMM3_SubRegsSet, XMM3_SuperRegsSet }, 770 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,… 790 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,… 810 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,… 1217 RI->mapDwarfRegToLLVMReg(20, X86::XMM3, false ); 1260 RI->mapDwarfRegToLLVMReg(24, X86::XMM3, false ); [all …]
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/external/swiftshader/third_party/LLVM/test/TableGen/ |
D | Slice.td | 44 def XMM3: Register<"xmm3">; 59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | cast.td | 44 def XMM3: Register<"xmm3">; 59 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | TargetInstrSpec.td | 45 def XMM3: Register<"xmm3">; 60 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | MultiPat.td | 53 def XMM3: Register<"xmm3">; 68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
D | TargetInstrSpec.td | 50 def XMM3: Register<"xmm3">; 65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | cast.td | 49 def XMM3: Register<"xmm3">; 64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | Slice.td | 43 def XMM3: Register<"xmm3">; 58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | MultiPat.td | 53 def XMM3: Register<"xmm3">; 68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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/external/llvm/test/TableGen/ |
D | TargetInstrSpec.td | 50 def XMM3: Register<"xmm3">; 65 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | cast.td | 49 def XMM3: Register<"xmm3">; 64 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | Slice.td | 43 def XMM3: Register<"xmm3">; 58 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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D | MultiPat.td | 53 def XMM3: Register<"xmm3">; 68 [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7,
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/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-mca/X86/BtVer2/ |
D | clear-super-register-2.s | 7 # the VDIVPS. That VADDPS also writes to register XMM3, and the upper half of
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/ |
D | X86GenCallingConv.inc | 235 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 885 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 909 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 1176 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 1553 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 1689 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6 1965 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,… 1989 …X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8,… 2203 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 2216 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 [all …]
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