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Searched refs:_TNL_ATTRIB_TEX0 (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_maos_vbtmp.h65 tc2 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data; in TAG()
66 tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride; in TAG()
67 if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 3) { in TAG()
70 else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 4) { in TAG()
82 tc1 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; in TAG()
83 tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride; in TAG()
84 if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 3) { in TAG()
87 else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 4) { in TAG()
97 if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { in TAG()
99 tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; in TAG()
[all …]
Dradeon_maos_arrays.c256 (char *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->data, in radeonEmitArrays()
257 VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size, in radeonEmitArrays()
258 VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->stride, in radeonEmitArrays()
265 if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) { in radeonEmitArrays()
271 else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) && in radeonEmitArrays()
274 GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3); in radeonEmitArrays()
Dradeon_swtcl.c114 (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX))) { in radeonSetVertexFormat()
177 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in radeonSetVertexFormat()
182 GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; in radeonSetVertexFormat()
187 EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_2F, in radeonSetVertexFormat()
193 EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F, in radeonSetVertexFormat()
196 EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_2F, in radeonSetVertexFormat()
203 EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F, in radeonSetVertexFormat()
206 EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F_XYW, in radeonSetVertexFormat()
297 (BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX) in radeonChooseVertexState()
Dradeon_maos_verts.c351 if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) { in radeonEmitArrays()
357 else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) && in radeonEmitArrays()
360 GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3); in radeonEmitArrays()
/external/mesa3d/src/mesa/tnl/
Dt_context.h86 _TNL_ATTRIB_TEX0, enumerator
143 #define _TNL_ATTRIB_TEX(u) (_TNL_ATTRIB_TEX0 + (u))
155 #define _TNL_FIRST_TEX _TNL_ATTRIB_TEX0
Dt_vb_texmat.c72 VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]); in run_texmat_stage()
Dt_context.c178 tnl->render_inputs_bitset |= BITFIELD64_BIT(_TNL_ATTRIB_TEX0); in _tnl_InvalidateState()
Dt_vb_program.c443 VB->AttribPtr[_TNL_ATTRIB_TEX0 + i] in run_vp()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_swtcl.c103 (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) ) { in r200SetVertexFormat()
163 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in r200SetVertexFormat()
168 GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; in r200SetVertexFormat()
171 EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_1F + sz - 1, 0 ); in r200SetVertexFormat()
258 if ((0 == (tnl->render_inputs_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX))) in r200ChooseVertexState()
264 if (tnl->render_inputs_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in r200ChooseVertexState()
/external/mesa3d/src/mesa/swrast_setup/
Dss_context.c147 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) in setup_vertex_format()
283 _tnl_get_attr( ctx, vertex, _TNL_ATTRIB_TEX0 + i, in _swsetup_Translate()
/external/mesa3d/src/mesa/drivers/dri/i915/
Di830_vtbl.c96 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in i830_render_start()
127 if (index_bitset & BITFIELD64_RANGE(_TNL_ATTRIB_TEX0, _TNL_NUM_TEX)) { in i830_render_start()
132 GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; in i830_render_start()
160 EMIT_ATTR(_TNL_ATTRIB_TEX0 + i, emit, 0); in i830_render_start()
Di915_fragprog.c1282 int sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; in i915ValidateFragmentProgram()
1287 EMIT_ATTR(_TNL_ATTRIB_TEX0 + i, EMIT_SZ(sz), 0, sz * 4); in i915ValidateFragmentProgram()
/external/mesa3d/src/mesa/x86/
Dgen_matypes.c145 OFFSET( "VB_TEX0_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX0] ); in main()
/external/mesa3d/src/mesa/drivers/dri/nouveau/
Dnv04_render.c85 swtnl_emit_attr(ctx, &map[n++], _TNL_ATTRIB_TEX0, EMIT_2F); in swtnl_choose_attrs()