| /external/u-boot/drivers/reset/ |
| D | sti-reset.c | 67 #define _SYSCFG_RST_CH(_c, _rr, _rb, _ar, _ab) \ argument
69 .reset_offset = _rr, \
74 #define _SYSCFG_RST_CH_NO_ACK(_c, _rr, _rb) \ argument
76 .reset_offset = _rr, \
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 125 def _rr : JMP_RR<Opc, OpcodeStr, Cond>;
179 def _rr : ALU_RR<Opc, OpcodeStr, OpNode>;
|
| /external/v8/src/compiler/s390/ |
| D | code-generator-s390.cc | 469 static inline int AssembleBinOp(Instruction* instr, _RR _rr, _RM _rm, _RI _ri) { in AssembleBinOp() argument
470 return AssembleOp<2>(instr, _rr, _rm, _ri); in AssembleBinOp()
478 #define ASSEMBLE_BIN_OP(_rr, _rm, _ri) AssembleBinOp(instr, _rr, _rm, _ri) argument
489 #define ASSEMBLE_BIN32_OP(_rr, _rm, _ri) \ argument
490 { CHECK_AND_ZERO_EXT_OUTPUT(AssembleBinOp(instr, _rr, _rm, _ri)); }
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 171 def _rr : JMP_RR<Opc, OpcodeStr, Cond>;
213 def _rr : ALU_RR<BPF_ALU64, Opc,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
| D | ARCInstrInfo.td | 176 def _rr : F32_DOP_RR<0b00100, subop, F, (outs), (ins GPR32:$B, GPR32:$C),
193 def _rr : F32_SOP_RR<major, subop, 0, (outs GPR32:$B), (ins GPR32:$C),
|
| /external/ImageMagick/PerlMagick/t/reference/write/filter/ |
| D | Convolve.miff | 43 …@o�Et�Ls�Rs�Wq�Yb�un�����������������������ř��muhRSM31.54/991?>5GD9MH8PL>][_rr�vt�gb~VQcHCJ?;:;73<…
|
| /external/llvm/docs/TableGen/ |
| D | LangIntro.rst | 390 def _rr : inst<opc, !strconcat(asmstr, " $dst, $src1, $src2"),
|
| /external/swiftshader/third_party/llvm-7.0/llvm/docs/TableGen/ |
| D | LangIntro.rst | 470 def _rr : inst<opc, !strconcat(asmstr, " $dst, $src1, $src2"),
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfoV4.td | 603 def L4_#NAME#_rr : T_load_rr <mnemonic, RC, MajOp>;
986 def S4_#NAME#_rr : T_store_rr <mnemonic, RC, MajOp, isH>;
|
| D | HexagonInstrInfo.td | 125 let BaseOpcode = mnemonic#_rr;
151 let BaseOpcode = mnemonic#_rr;
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.td | 414 def _rr: NVPTXInst<(outs Int1Regs:$dst), (ins Int1Regs:$a, Int1Regs:$b),
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXInstrInfo.td | 500 def _rr: NVPTXInst<(outs Int1Regs:$dst), (ins Int1Regs:$a, Int1Regs:$b),
|
| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | 7145012b5b575a0f12c17d6e14bd32fc.000f35d9.honggfuzz.cov | 1791 �q���hG>��TQʸ|,���wZ~uHDjuD��ј@� pà���I�* f��<� 혤(%LAȦě�p.��*n�~2�Y��ʝ5��� �{b��_rr�ӊ���…
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|
| D | 42c9e6e34c1e7bd1b8617878e9f60423.000d4df4.honggfuzz.cov | 1445 �q���hG>��TQʸ|,���wZ~uHDjuD��ј@� pà���I�* f��<� 혤(%LAȦě�p.��*n�~2�Y��ʝ5��� �{b��_rr�ӊ���…
|
| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 42c9e6e34c1e7bd1b8617878e9f60423.000d4df4.honggfuzz.cov | 1445 �q���hG>��TQʸ|,���wZ~uHDjuD��ј@� pà���I�* f��<� 혤(%LAȦě�p.��*n�~2�Y��ʝ5��� �{b��_rr�ӊ���…
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