Home
last modified time | relevance | path

Searched refs:addr_hi (Results 1 – 17 of 17) sorted by relevance

/external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/
Daddress-mode-global.ll12 %addr_hi.int = add i32 4, %base
14 %addr_hi.ptr = inttoptr i32 %addr_hi.int to i32*
16 %addr_hi.load = load i32, i32* %addr_hi.ptr, align 1
17 %result = add i32 %addr_lo.load, %addr_hi.load
/external/u-boot/include/fsl-mc/
Dfsl_dpaa_fd.h18 u32 addr_hi; member
40 return (u64)((((uint64_t)fd->simple.addr_hi) << 32) in ldpaa_fd_get_addr()
46 fd->simple.addr_hi = upper_32_bits(addr); in ldpaa_fd_set_addr()
Dfsl_qbman_base.h72 uint32_t addr_hi; member
/external/u-boot/drivers/usb/eth/
Dlan75xx.c137 u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]); in lan75xx_write_hwaddr() local
145 ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi); in lan75xx_write_hwaddr()
153 addr_hi |= LAN75XX_ADDR_FILTX_FB_VALID; in lan75xx_write_hwaddr()
154 ret = lan7x_write_reg(udev, LAN75XX_ADDR_FILTX, addr_hi); in lan75xx_write_hwaddr()
Dlan78xx.c309 u32 addr_hi = (u32)get_unaligned_le16(&enetaddr[4]); in lan78xx_write_hwaddr() local
317 ret = lan7x_write_reg(udev, RX_ADDRH, addr_hi); in lan78xx_write_hwaddr()
326 addr_hi | LAN78XX_MAF_HI_VALID); in lan78xx_write_hwaddr()
Dsmsc95xx.c394 u32 addr_hi = get_unaligned_le16(&enetaddr[4]); in smsc95xx_write_hwaddr_common() local
403 ret = smsc95xx_write_reg(udev, ADDRH, addr_hi); in smsc95xx_write_hwaddr_common()
/external/u-boot/drivers/crypto/fsl/
Djr.c191 uint32_t *addr_hi, *addr_lo; in jr_enqueue() local
224 addr_hi = (uint32_t *)(&jr->input_ring[head]) + 1; in jr_enqueue()
226 addr_hi = (uint32_t *)(&jr->input_ring[head]); in jr_enqueue()
230 sec_out32(addr_hi, (uint32_t)(desc_phys_addr >> 32)); in jr_enqueue()
267 uint32_t *addr_hi, *addr_lo; in jr_dequeue() local
285 addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc) + 1; in jr_dequeue()
287 addr_hi = (uint32_t *)(&jr->output_ring[jr->tail].desc); in jr_dequeue()
291 op_desc = ((u64)sec_in32(addr_hi) << 32) | in jr_dequeue()
Dfsl_hash.c96 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, (uint32_t)(addr >> 32)); in caam_hash_update()
98 sec_out32(&ctx->sg_tbl[ctx->sg_num].addr_hi, 0x0); in caam_hash_update()
/external/u-boot/include/
Dfsl_sec.h203 uint32_t addr_hi; /* Memory Address of start of buffer - hi */ member
205 uint32_t addr_hi; /* Memory Address of start of buffer - hi */
Dahci.h131 u32 addr_hi; member
/external/kernel-headers/original/uapi/drm/
Dradeon_drm.h203 unsigned char cmd_type, addr_lo, addr_hi, count; member
/external/libdrm/include/drm/
Dradeon_drm.h203 unsigned char cmd_type, addr_lo, addr_hi, count; member
/external/u-boot/drivers/ddr/marvell/a38x/
Dddr3_training.c260 u32 data, addr_hi, data_high; in ddr3_tip_configure_cs() local
273 addr_hi = mem_size_config[mem_index] & 0x3; in ddr3_tip_configure_cs()
277 (addr_hi << (2 + cs_num * 4)), in ddr3_tip_configure_cs()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dr200_state_init.c190 h.veclinear.addr_hi = (offset & 0xff00) >> 8; in cmdveclinear()
293 _start = h.veclinear.addr_lo | (h.veclinear.addr_hi << 8); \
Dr200_sanity.c943 int start = header.veclinear.addr_lo | (header.veclinear.addr_hi << 8); in radeon_emit_veclinear()
/external/u-boot/drivers/ata/
Dahci.c518 ahci_sg->addr_hi = 0; in ahci_fill_sg()
Ddwc_ahsata.c339 ahci_sg->addr_hi = 0; in ahci_fill_sg()