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/external/swiftshader/third_party/LLVM/lib/Target/XCore/
DXCoreInstrFormats.td13 class InstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
20 let AsmString = asmstr;
25 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
26 : InstXCore<outs, ins, asmstr, pattern>;
32 class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern>
33 : InstXCore<outs, ins, asmstr, pattern> {
37 class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern>
38 : InstXCore<outs, ins, asmstr, pattern> {
42 class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern>
43 : InstXCore<outs, ins, asmstr, pattern> {
[all …]
/external/llvm/lib/Target/Hexagon/
DHexagonInstrFormatsV60.td42 class CVI_VA_Resource<dag outs, dag ins, string asmstr,
45 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VA>,
48 class CVI_VA_DV_Resource<dag outs, dag ins, string asmstr,
51 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VA_DV>,
54 class CVI_VX_Resource_long<dag outs, dag ins, string asmstr,
57 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VX>,
60 class CVI_VX_Resource_late<dag outs, dag ins, string asmstr,
63 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VX>,
66 class CVI_VX_Resource<dag outs, dag ins, string asmstr,
69 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeCVI_VX>,
[all …]
DHexagonInstrFormats.td79 class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern,
86 let AsmString = asmstr;
210 class LDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
212 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeLD>, OpcodeHexagon;
215 class LDInst2<dag outs, dag ins, string asmstr, list<dag> pattern = [],
217 : LDInst<outs, ins, asmstr, pattern, cstr>;
219 class CONSTLDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
221 : LDInst<outs, ins, asmstr, pattern, cstr>;
225 class LDInstPost<dag outs, dag ins, string asmstr, list<dag> pattern = [],
227 : LDInst<outs, ins, asmstr, pattern, cstr>;
[all …]
DHexagonInstrFormatsV4.td108 class NVInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
110 : InstHexagon<outs, ins, asmstr, pattern, cstr, itin, TypeNV>, OpcodeHexagon;
112 class NVInst_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
114 : NVInst<outs, ins, asmstr, pattern, cstr, itin>;
117 class NVInstPost_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
119 : NVInst<outs, ins, asmstr, pattern, cstr, itin>;
123 class NVInstPI_V4<dag outs, dag ins, string asmstr, list<dag> pattern = [],
125 : NVInst<outs, ins, asmstr, pattern, cstr, itin>;
128 class NCJInst<dag outs, dag ins, string asmstr, list<dag> pattern = [],
130 : NVInst<outs, ins, asmstr, pattern, cstr>;
[all …]
/external/llvm/lib/Target/XCore/
DXCoreInstrFormats.td13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
20 let AsmString = asmstr;
27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
28 : InstXCore<0, outs, ins, asmstr, pattern> {
36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
37 : InstXCore<2, outs, ins, asmstr, pattern> {
45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
46 : _F3R<opc, outs, ins, asmstr, pattern> {
50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
51 : InstXCore<4, outs, ins, asmstr, pattern> {
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/
DXCoreInstrFormats.td13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
20 let AsmString = asmstr;
27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern>
28 : InstXCore<0, outs, ins, asmstr, pattern> {
36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
37 : InstXCore<2, outs, ins, asmstr, pattern> {
45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
46 : _F3R<opc, outs, ins, asmstr, pattern> {
50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern>
51 : InstXCore<4, outs, ins, asmstr, pattern> {
[all …]
/external/llvm/lib/Target/MSP430/
DMSP430InstrFormats.td55 string asmstr> : Instruction {
71 let AsmString = asmstr;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
79 : MSP430Inst<outs, ins, sz, DoubleOpFrm, asmstr> {
93 dag outs, dag ins, string asmstr, list<dag> pattern>
94 : IForm<opcode, dest, 1, src, sz, outs, ins, asmstr, pattern>;
97 dag outs, dag ins, string asmstr, list<dag> pattern>
98 : IForm8<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
101 dag outs, dag ins, string asmstr, list<dag> pattern>
102 : IForm8<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/
DMSP430InstrFormats.td55 string asmstr> : Instruction {
71 let AsmString = asmstr;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
79 : MSP430Inst<outs, ins, sz, DoubleOpFrm, asmstr> {
93 dag outs, dag ins, string asmstr, list<dag> pattern>
94 : IForm<opcode, dest, 1, src, sz, outs, ins, asmstr, pattern>;
97 dag outs, dag ins, string asmstr, list<dag> pattern>
98 : IForm8<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
101 dag outs, dag ins, string asmstr, list<dag> pattern>
102 : IForm8<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430InstrFormats.td55 string asmstr> : Instruction {
71 let AsmString = asmstr;
78 dag outs, dag ins, string asmstr, list<dag> pattern>
79 : MSP430Inst<outs, ins, sz, DoubleOpFrm, asmstr> {
93 dag outs, dag ins, string asmstr, list<dag> pattern>
94 : IForm<opcode, dest, 1, src, sz, outs, ins, asmstr, pattern>;
97 dag outs, dag ins, string asmstr, list<dag> pattern>
98 : IForm8<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
101 dag outs, dag ins, string asmstr, list<dag> pattern>
102 : IForm8<opcode, DstReg, SrcImm, Size4Bytes, outs, ins, asmstr, pattern>;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
26 let AsmString = asmstr;
83 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
97 let AsmString = asmstr;
118 class IXFormMemOp<bits<6> opcode, dag OOL, dag IOL, string asmstr,
120 :I<opcode, OOL, IOL, asmstr, itin>, XFormMemOp;
123 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
125 : I<opcode, OOL, IOL, asmstr, itin> {
135 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
136 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrFormats.td14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
24 let AsmString = asmstr;
56 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
58 : I<opcode, OOL, IOL, asmstr, itin> {
68 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
69 : I<opcode, OOL, IOL, asmstr, BrB> {
87 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
89 : I<opcode, OOL, IOL, asmstr, itin> {
101 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
103 : I<opcode, OOL, IOL, asmstr, itin> {
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
26 let AsmString = asmstr;
68 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
82 let AsmString = asmstr;
103 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
105 : I<opcode, OOL, IOL, asmstr, itin> {
115 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
116 : I<opcode, OOL, IOL, asmstr, IIC_BrB> {
133 string asmstr>
134 : BForm<opcode, aa, lk, OOL, IOL, asmstr> {
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZInstrFormats.td57 class I8<bits<8> op, Format f, dag outs, dag ins, string asmstr,
64 let AsmString = asmstr;
67 class I12<bits<12> op, Format f, dag outs, dag ins, string asmstr,
74 let AsmString = asmstr;
77 class I16<bits<16> op, Format f, dag outs, dag ins, string asmstr,
81 let AsmString = asmstr;
84 class RRI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern>
85 : I8<op, RRForm, outs, ins, asmstr, pattern>;
87 class RII<bits<12> op, dag outs, dag ins, string asmstr, list<dag> pattern>
88 : I12<op, RIForm, outs, ins, asmstr, pattern>;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/
DARCInstrFormats.td59 class InstARC<int sz, dag outs, dag ins, string asmstr, list<dag> pattern>
65 let AsmString = asmstr;
71 class PseudoInstARC<dag outs, dag ins, string asmstr, list<dag> pattern>
72 : InstARC<0, outs, ins, asmstr, pattern> {
106 class F32_BR<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
108 InstARC<4, outs, ins, asmstr, pattern> {
116 class F32_BR_COND<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
118 F32_BR<major, outs, ins, b16, asmstr, pattern> {
126 class F32_BR_UCOND_FAR<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
128 F32_BR<major, outs, ins, b16, asmstr, pattern> {
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/
DAVRInstrFormats.td15 class AVRInst<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction
21 let AsmString = asmstr;
28 class AVRInst16<dag outs, dag ins, string asmstr, list<dag> pattern>
29 : AVRInst<outs, ins, asmstr, pattern>
37 class AVRInst32<dag outs, dag ins, string asmstr, list<dag> pattern>
38 : AVRInst<outs, ins, asmstr, pattern>
53 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
54 : AVRInst16<outs, ins, asmstr, pattern>
70 class FRdRr<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
71 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern>
[all …]
/external/llvm/lib/Target/AVR/
DAVRInstrFormats.td15 class AVRInst<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction
21 let AsmString = asmstr;
26 class AVRInst16<dag outs, dag ins, string asmstr, list<dag> pattern>
27 : AVRInst<outs, ins, asmstr, pattern>
35 class AVRInst32<dag outs, dag ins, string asmstr, list<dag> pattern>
36 : AVRInst<outs, ins, asmstr, pattern>
51 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern>
52 : AVRInst16<outs, ins, asmstr, pattern>
68 class FRdRr<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr,
69 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern>
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DSPUInstrFormats.td17 class SPUInstr<dag OOL, dag IOL, string asmstr, InstrItinClass itin>
24 let AsmString = asmstr;
29 class RRForm<bits<11> opcode, dag OOL, dag IOL, string asmstr,
31 : SPUInstr<OOL, IOL, asmstr, itin> {
46 class RRForm_1<bits<11> opcode, dag OOL, dag IOL, string asmstr,
48 : RRForm<opcode, OOL, IOL, asmstr, itin, pattern>
54 class RRForm_2<bits<11> opcode, dag OOL, dag IOL, string asmstr,
56 : RRForm<opcode, OOL, IOL, asmstr, itin, pattern>
64 class RRForm_3<bits<11> opcode, dag OOL, dag IOL, string asmstr,
66 : RRForm<opcode, OOL, IOL, asmstr, itin, pattern>
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/
DSparcInstrFormats.td10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern,
23 let AsmString = asmstr;
37 class F2<dag outs, dag ins, string asmstr, list<dag> pattern,
39 : InstSP<outs, ins, asmstr, pattern, itin> {
49 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern,
51 : F2<outs, ins, asmstr, pattern, itin> {
59 class F2_2<bits<3> op2Val, bit annul, dag outs, dag ins, string asmstr,
61 : F2<outs, ins, asmstr, pattern, itin> {
70 dag outs, dag ins, string asmstr, list<dag> pattern,
72 : InstSP<outs, ins, asmstr, pattern, itin> {
[all …]
/external/llvm/lib/Target/Sparc/
DSparcInstrFormats.td10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern,
23 let AsmString = asmstr;
37 class F2<dag outs, dag ins, string asmstr, list<dag> pattern,
39 : InstSP<outs, ins, asmstr, pattern, itin> {
49 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern,
51 : F2<outs, ins, asmstr, pattern, itin> {
59 class F2_2<bits<3> op2Val, bit annul, dag outs, dag ins, string asmstr,
61 : F2<outs, ins, asmstr, pattern, itin> {
70 dag outs, dag ins, string asmstr, list<dag> pattern,
72 : InstSP<outs, ins, asmstr, pattern, itin> {
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips16InstrFormats.td36 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern,
45 let AsmString = asmstr;
55 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
57 MipsInst16_Base<outs, ins, asmstr, pattern, itin>
72 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern,
74 MipsInst16_Base<outs, ins, asmstr, pattern, itin>
82 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern,
84 MipsInst16_32<outs, ins, asmstr, pattern, itin>
92 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>:
93 MipsInst16<outs, ins, asmstr, pattern, IIPseudo> {
[all …]
/external/llvm/lib/Target/Mips/
DMips16InstrFormats.td36 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern,
45 let AsmString = asmstr;
55 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern,
57 MipsInst16_Base<outs, ins, asmstr, pattern, itin>
72 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern,
74 MipsInst16_Base<outs, ins, asmstr, pattern, itin>
82 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern,
84 MipsInst16_32<outs, ins, asmstr, pattern, itin>
92 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>:
93 MipsInst16<outs, ins, asmstr, pattern, IIPseudo> {
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaInstrFormats.td31 class InstAlpha<bits<6> op, string asmstr, InstrItinClass itin> : Instruction {
34 let AsmString = asmstr;
41 class MForm<bits<6> opcode, bit load, string asmstr, list<dag> pattern, InstrItinClass itin>
42 : InstAlpha<opcode, asmstr, itin> {
55 class MfcForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin>
56 : InstAlpha<opcode, asmstr, itin> {
65 class MfcPForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin>
66 : InstAlpha<opcode, asmstr, itin> {
74 class MbrForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, InstrItinClass itin>
75 : InstAlpha<opcode, asmstr, itin> {
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DSparcInstrFormats.td10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction {
20 let AsmString = asmstr;
29 class F2<dag outs, dag ins, string asmstr, list<dag> pattern>
30 : InstSP<outs, ins, asmstr, pattern> {
40 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern>
41 : F2<outs, ins, asmstr, pattern> {
49 class F2_2<bits<4> condVal, bits<3> op2Val, dag outs, dag ins, string asmstr,
50 list<dag> pattern> : F2<outs, ins, asmstr, pattern> {
65 class F3<dag outs, dag ins, string asmstr, list<dag> pattern>
66 : InstSP<outs, ins, asmstr, pattern> {
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/
DNios2InstrFormats.td75 class Nios2Inst32<dag outs, dag ins, string asmstr, list<dag> pattern,
92 let AsmString = asmstr;
104 class Nios2Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern,
106 Nios2Inst32<outs, ins, asmstr, pattern, Itin, Pseudo> {
116 class Nios2R1Inst32<dag outs, dag ins, string asmstr, list<dag> pattern,
118 Nios2Inst32<outs, ins, asmstr, pattern, itin, f> {
123 class Nios2R2Inst32<dag outs, dag ins, string asmstr, list<dag> pattern,
125 Nios2Inst32<outs, ins, asmstr, pattern, itin, f> {
134 class FI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
135 InstrItinClass itin>: Nios2R1Inst32<outs, ins, asmstr,
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrFormats.td40 class MipsInst<dag outs, dag ins, string asmstr, list<dag> pattern,
56 let AsmString = asmstr;
70 class MipsPseudo<dag outs, dag ins, string asmstr, list<dag> pattern>:
71 MipsInst<outs, ins, asmstr, pattern, IIPseudo, Pseudo> {
80 class FR<bits<6> op, bits<6> _funct, dag outs, dag ins, string asmstr,
82 MipsInst<outs, ins, asmstr, pattern, itin, FrmR>
104 class FI<bits<6> op, dag outs, dag ins, string asmstr, list<dag> pattern,
105 InstrItinClass itin>: MipsInst<outs, ins, asmstr, pattern, itin, FrmI>
118 class CBranchBase<bits<6> op, dag outs, dag ins, string asmstr,
120 MipsInst<outs, ins, asmstr, pattern, itin, FrmI>
[all …]

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