| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 312 def : ROSysReg<"MDCCSR_EL0", 0b10, 0b011, 0b0000, 0b0001, 0b000>;
313 def : ROSysReg<"DBGDTRRX_EL0", 0b10, 0b011, 0b0000, 0b0101, 0b000>;
314 def : ROSysReg<"MDRAR_EL1", 0b10, 0b000, 0b0001, 0b0000, 0b000>;
315 def : ROSysReg<"OSLSR_EL1", 0b10, 0b000, 0b0001, 0b0001, 0b100>;
316 def : ROSysReg<"DBGAUTHSTATUS_EL1", 0b10, 0b000, 0b0111, 0b1110, 0b110>;
367 def : ROSysReg<"TRCSTATR", 0b10, 0b001, 0b0000, 0b0011, 0b000>;
368 def : ROSysReg<"TRCIDR8", 0b10, 0b001, 0b0000, 0b0000, 0b110>;
369 def : ROSysReg<"TRCIDR9", 0b10, 0b001, 0b0000, 0b0001, 0b110>;
370 def : ROSysReg<"TRCIDR10", 0b10, 0b001, 0b0000, 0b0010, 0b110>;
371 def : ROSysReg<"TRCIDR11", 0b10, 0b001, 0b0000, 0b0011, 0b110>;
[all …]
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| /external/libaom/libaom/test/ |
| D | test_data_util.cmake | 169 "av1-1-b10-00-quantizer-00.ivf"
170 "av1-1-b10-00-quantizer-00.ivf.md5"
171 "av1-1-b10-00-quantizer-01.ivf"
172 "av1-1-b10-00-quantizer-01.ivf.md5"
173 "av1-1-b10-00-quantizer-02.ivf"
174 "av1-1-b10-00-quantizer-02.ivf.md5"
175 "av1-1-b10-00-quantizer-03.ivf"
176 "av1-1-b10-00-quantizer-03.ivf.md5"
177 "av1-1-b10-00-quantizer-04.ivf"
178 "av1-1-b10-00-quantizer-04.ivf.md5"
[all …]
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| D | test-data.sha1 | 392 9bbe8499796aa588ff02e313fb0d4349940d2fea *av1-1-b10-00-quantizer-00.ivf
393 36b402eedad2bacee8ac09acce44e2fc356dd80b *av1-1-b10-00-quantizer-00.ivf.md5
394 1d5e1d2827624f328020bf123df213bb175577e0 *av1-1-b10-00-quantizer-01.ivf
395 16c529be5502369e43ce9c6fe99a9709968e3daf *av1-1-b10-00-quantizer-01.ivf.md5
396 39abc20739242a8f05efd4b35d7603c8ad7ff45d *av1-1-b10-00-quantizer-02.ivf
397 81faa72c3d43b003966fe09ffaae51b07b1059be *av1-1-b10-00-quantizer-02.ivf.md5
398 92ebf349b803333a43824a83d997b8cf76f656f9 *av1-1-b10-00-quantizer-03.ivf
399 5e7556dc998cb8b506a43cc078e30802d7e600e6 *av1-1-b10-00-quantizer-03.ivf.md5
400 1c496177c66e49f2e3556af87ec67afb5060170b *av1-1-b10-00-quantizer-04.ivf
401 560fea4800a44fe19ed8d3e74f425bdbf1fb8abd *av1-1-b10-00-quantizer-04.ivf.md5
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64SystemOperands.td | 470 def : ROSysReg<"MDCCSR_EL0", 0b10, 0b011, 0b0000, 0b0001, 0b000>;
471 def : ROSysReg<"DBGDTRRX_EL0", 0b10, 0b011, 0b0000, 0b0101, 0b000>;
472 def : ROSysReg<"MDRAR_EL1", 0b10, 0b000, 0b0001, 0b0000, 0b000>;
473 def : ROSysReg<"OSLSR_EL1", 0b10, 0b000, 0b0001, 0b0001, 0b100>;
474 def : ROSysReg<"DBGAUTHSTATUS_EL1", 0b10, 0b000, 0b0111, 0b1110, 0b110>;
531 def : ROSysReg<"TRCSTATR", 0b10, 0b001, 0b0000, 0b0011, 0b000>;
532 def : ROSysReg<"TRCIDR8", 0b10, 0b001, 0b0000, 0b0000, 0b110>;
533 def : ROSysReg<"TRCIDR9", 0b10, 0b001, 0b0000, 0b0001, 0b110>;
534 def : ROSysReg<"TRCIDR10", 0b10, 0b001, 0b0000, 0b0010, 0b110>;
535 def : ROSysReg<"TRCIDR11", 0b10, 0b001, 0b0000, 0b0011, 0b110>;
[all …]
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| D | AArch64SVEInstrInfo.td | 31 def EOR_ZZZ : sve_int_bin_cons_log<0b10, "eor">;
69 defm AND_ZI : sve_int_log_imm<0b10, "and", "bic">;
72 defm SMIN_ZI : sve_int_arith_imm1<0b10, "smin", simm8>;
156 defm FNMLA_ZPmZZ : sve_fp_3op_p_zds_a<0b10, "fnmla">;
161 defm FNMAD_ZPmZZ : sve_fp_3op_p_zds_b<0b10, "fnmad">;
217 defm UUNPKLO_ZZ : sve_int_perm_unpk<0b10, "uunpklo">;
231 def BRKPAS_PPzPP : sve_int_brkp<0b10, "brkpas">;
299 defm LD1RB_S_IMM : sve_mem_ld_dup<0b00, 0b10, "ld1rb", Z_s, ZPR32, uimm6s1>;
303 defm LD1RH_S_IMM : sve_mem_ld_dup<0b01, 0b10, "ld1rh", Z_s, ZPR32, uimm6s2>;
305 defm LD1RSH_D_IMM : sve_mem_ld_dup<0b10, 0b00, "ld1rsh", Z_d, ZPR64, uimm6s2>;
[all …]
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| /external/google-breakpad/src/testing/gtest/test/ |
| D | gtest-tuple_test.cc | 164 tuple<int, int, int, int, int, int, int, int, int, int> a10, b10; in TEST() local
165 b10 = a10; in TEST()
166 EXPECT_EQ(0, get<0>(b10)); in TEST()
167 EXPECT_EQ(0, get<1>(b10)); in TEST()
168 EXPECT_EQ(0, get<2>(b10)); in TEST()
169 EXPECT_EQ(0, get<3>(b10)); in TEST()
170 EXPECT_EQ(0, get<4>(b10)); in TEST()
171 EXPECT_EQ(0, get<5>(b10)); in TEST()
172 EXPECT_EQ(0, get<6>(b10)); in TEST()
173 EXPECT_EQ(0, get<7>(b10)); in TEST()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/ |
| D | fpelim-basic.ll | 23 br i1 %v9, label %b10, label %b5
25 b10: ; preds = %b5
30 b12: ; preds = %b12, %b10
31 %v13 = phi i32 [ 0, %b10 ], [ %v18, %b12 ]
32 %v14 = phi i32 [ 0, %b10 ], [ %v17, %b12 ]
63 br i1 %v9, label %b10, label %b5
65 b10: ; preds = %b5
70 b12: ; preds = %b12, %b10
71 %v13 = phi i32 [ 0, %b10 ], [ %v18, %b12 ]
72 %v14 = phi i32 [ 0, %b10 ], [ %v17, %b12 ]
|
| D | swp-exit-fixup.ll | 38 br i1 %v0, label %b10, label %b11
40 b10: ; preds = %b10, %b9
41 %v1 = phi i32 [ %v8, %b10 ], [ 1, %b9 ]
51 br i1 %v9, label %b11, label %b10
53 b11: ; preds = %b10, %b9, %b5
54 %v10 = phi i1 [ false, %b9 ], [ false, %b5 ], [ %v0, %b10 ]
|
| D | swp-more-phi.ll | 23 br i1 undef, label %b5, label %b10
35 br i1 undef, label %b10, label %b9
45 br i1 %v9, label %b10, label %b9
47 b10: ; preds = %b9, %b8, %b4
51 b11: ; preds = %b10
54 b12: ; preds = %b10
|
| D | swp-phi-dep.ll | 40 br i1 undef, label %b9, label %b10
42 b10: ; preds = %b9
45 b11: ; preds = %b11, %b10, %b8
46 %v0 = phi i32 [ %v6, %b11 ], [ undef, %b8 ], [ undef, %b10 ]
47 %v1 = phi i32 [ %v0, %b11 ], [ %a0, %b8 ], [ undef, %b10 ]
57 b12: ; preds = %b11, %b10, %b7
|
| D | builtin-expect.ll | 3 ; Check that the branch to the block b10 is marked as taken (i.e. ":t").
14 br i1 %v2, label %b3, label %b10, !prof !0
27 b10: ; preds = %b1
35 b14: ; preds = %b13, %b10
36 %v15 = phi i32 [ %v12, %b10 ], [ 0, %b13 ]
|
| D | expand-condsets-undefvni.ll | 22 br i1 undef, label %b8, label %b10
28 b10: ; preds = %b6
31 b11: ; preds = %b10
44 b16: ; preds = %b15, %b14, %b13, %b11, %b10, %b8
45 …ndef, %b13 ], [ -2251799813685248, %b14 ], [ 0, %b15 ], [ %v12, %b11 ], [ %v9, %b8 ], [ %v7, %b10 ]
|
| D | postinc-order.ll | 12 b1: ; preds = %b10
44 br label %b10
57 b10: ; preds = %b10, %b8
58 %v18 = phi i32 [ %v19, %b10 ], [ %v9, %b8 ]
65 br i1 %v23, label %b1, label %b10
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| D | swp-change-dep.ll | 34 br label %b10
36 b10: ; preds = %b10, %b9
37 br i1 undef, label %b11, label %b10
39 b11: ; preds = %b10
|
| D | swp-chain-refs.ll | 46 br i1 undef, label %b9, label %b10
49 br label %b10
51 b10: ; preds = %b9, %b8
54 b11: ; preds = %b10
57 b12: ; preds = %b10
|
| D | vect-downscale.ll | 54 b2: ; preds = %b10, %b1
55 %v26 = phi i8* [ %v25, %b1 ], [ %v90, %b10 ]
56 %v27 = phi i8* [ %v24, %b1 ], [ %v89, %b10 ]
57 %v28 = phi i8* [ %v21, %b1 ], [ %v88, %b10 ]
58 %v29 = phi <16 x i32> [ undef, %b1 ], [ %v85, %b10 ]
59 %v30 = phi <16 x i32> [ undef, %b1 ], [ %v84, %b10 ]
60 %v31 = phi i8* [ %a0, %b1 ], [ %v86, %b10 ]
61 %v32 = phi i8* [ %a4, %b1 ], [ %v87, %b10 ]
62 %v33 = phi i32 [ 0, %b1 ], [ %v37, %b10 ]
112 br i1 %v18, label %b10, label %b7
[all …]
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| D | swp-phi-def-use.ll | 87 br label %b10
89 b10: ; preds = %b10, %b9
90 %v32 = phi i32 [ %v22, %b9 ], [ %v39, %b10 ]
91 %v33 = phi i32 [ %v29, %b9 ], [ %v38, %b10 ]
100 br i1 %v40, label %b10, label %b11
102 b11: ; preds = %b10, %b8, %b7
103 %v41 = phi i32 [ %v29, %b8 ], [ %v29, %b7 ], [ %v38, %b10 ]
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| D | find-loop-instr.ll | 29 br label %b10
40 b10: ; preds = %b21, %b6
44 b12: ; preds = %b10
73 b21: ; preds = %b20, %b19, %b16, %b10
76 br i1 %v23, label %b13, label %b10
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| D | bug6757-endloop.ll | 63 b6: ; preds = %b10, %b9, %b8, %b5
73 br i1 %v31, label %b10, label %b6
80 b10: ; preds = %b10, %b8
81 %v33 = phi i32 [ %v37, %b10 ], [ %v27, %b8 ]
82 %v34 = phi i32* [ %v35, %b10 ], [ %v24, %b8 ]
87 br i1 %v38, label %b10, label %b6
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| D | align_test.ll | 14 br i1 %v0, label %b1, label %b10
20 br i1 %v0, label %b3, label %b10
36 br i1 %v0, label %b6, label %b10
60 br label %b10
62 b10: ; preds = %b9, %b5, %b2, %b0
|
| D | bug17386.ll | 35 br i1 undef, label %b9, label %b10
38 br label %b10
40 b10: ; preds = %b9, %b8
47 b11: ; preds = %b10
50 b12: ; preds = %b10
|
| D | swp-cse-phi.ll | 9 br i1 undef, label %b10, label %b1
29 br i1 undef, label %b10, label %b9
48 br label %b10
50 b10: ; preds = %b9, %b6, %b0
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| D | brcond-setne.ll | 61 br i1 %v23, label %b2, label %b10
63 b10: ; preds = %b9
68 b11: ; preds = %b10, %b3, %b0
69 %v26 = phi i8 [ %v8, %b3 ], [ 0, %b0 ], [ %v25, %b10 ]
70 %v27 = phi i8* [ %v9, %b3 ], [ %v0, %b0 ], [ %v24, %b10 ]
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcInstrVIS.td | 17 : F3_3<0b10, 0b110110, opfval, outs, ins, asmstr, pattern>;
186 def FHADDS : F3_3<0b10, 0b110100, 0b001100001,
189 def FHADDD : F3_3<0b10, 0b110100, 0b001100010,
192 def FHSUBS : F3_3<0b10, 0b110100, 0b001100101,
195 def FHSUBD : F3_3<0b10, 0b110100, 0b001100110,
207 def FNADDS : F3_3<0b10, 0b110100, 0b001010001,
210 def FNADDD : F3_3<0b10, 0b110100, 0b001010010,
213 def FNHADDS : F3_3<0b10, 0b110100, 0b001110001,
216 def FNHADDD : F3_3<0b10, 0b110100, 0b001110010,
220 def FNMULS : F3_3<0b10, 0b110100, 0b001011001,
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcInstrVIS.td | 17 : F3_3<0b10, 0b110110, opfval, outs, ins, asmstr, pattern>;
186 def FHADDS : F3_3<0b10, 0b110100, 0b001100001,
189 def FHADDD : F3_3<0b10, 0b110100, 0b001100010,
192 def FHSUBS : F3_3<0b10, 0b110100, 0b001100101,
195 def FHSUBD : F3_3<0b10, 0b110100, 0b001100110,
207 def FNADDS : F3_3<0b10, 0b110100, 0b001010001,
210 def FNADDD : F3_3<0b10, 0b110100, 0b001010010,
213 def FNHADDS : F3_3<0b10, 0b110100, 0b001110001,
216 def FNHADDD : F3_3<0b10, 0b110100, 0b001110010,
220 def FNMULS : F3_3<0b10, 0b110100, 0b001011001,
[all …]
|