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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/loop-idiom/
Dpmpy-mod.ll40 br i1 %v21, label %b22, label %b26
48 b26: ; preds = %b9
51 b27: ; preds = %b26, %b22
52 %v28 = phi i16 [ %v25, %b22 ], [ %v5, %b26 ]
53 %v29 = phi i8 [ 1, %b22 ], [ 0, %b26 ]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Hexagon/
Dinvalid-memrefs.ll21 br i1 undef, label %b26, label %b3
27 br i1 undef, label %b5, label %b26
30 br i1 undef, label %b7, label %b26
99 b26: ; preds = %b5, %b4, %b2
Drdf-def-mask.ll15 br i1 %v2, label %b26, label %b3
40 br label %b26
42 b26: ; preds = %b3, %b1
Drdf-kill-last-op.ll122 br i1 %v26, label %b26, label %b27
124 b26: ; preds = %b25
127 b27: ; preds = %b26, %b25
154 b32: ; preds = %b31, %b28, %b26
155 %v39 = phi i16 [ %v38, %b31 ], [ %v2, %b28 ], [ %v2, %b26 ]
Dopt-addr-mode-subreg-use.ll139 br i1 undef, label %b26, label %b20
161 b26: ; preds = %b19
164 b27: ; preds = %b26
184 b32: ; preds = %b31, %b29, %b27, %b26, %b24, %b23, %b2…
Dpacketize-impdef.ll115 br i1 false, label %b25, label %b26
120 b26: ; preds = %b24
123 b27: ; preds = %b36, %b26
124 %v14 = phi i32 [ 16, %b26 ], [ %v30, %b36 ]
Dpacketize-impdef-1.ll132 br i1 %v28, label %b28, label %b26
134 b26: ; preds = %b25
Dbug14859-split-const-block-addr.ll215 br i1 %v90, label %b43, label %b26
217 b26: ; preds = %b25
220 b27: ; preds = %b27, %b26
221 %v91 = phi i8* [ %v93, %b27 ], [ %v88, %b26 ]
222 %v92 = phi i8* [ %v95, %b27 ], [ %v89, %b26 ]
Drdf-filter-defs.ll141 br i1 %t48, label %b22, label %b26
164 b26:
Dopt-glob-addrs-003.ll335 switch i16 %v209, label %b26 [
347 b26: ; preds = %b24
357 b28: ; preds = %b27, %b26
459 … ; preds = %b34, %b33, %b32, %b30, %b29, %b28, %b27, %b26, %b25, %b24, %b23, …
460 … 1, %b30 ], [ 1, %b32 ], [ 1, %b33 ], [ 0, %b0 ], [ 1, %b7 ], [ 1, %b13 ], [ 1, %b25 ], [ 0, %b26 ]
Dregisterscavenger-fail1.ll201 br i1 false, label %b26, label %b27
203 b26: ; preds = %b25
Dconcat-vectors-legalize.ll562 br i1 %v443, label %b26, label %b22
564 b23: ; preds = %b26, %b23
565 %v444 = phi i32 [ %v521, %b23 ], [ %v356, %b26 ]
647 b24: ; preds = %b26, %b23
656 b26: ; preds = %b22
/external/vixl/test/aarch64/
Dtest-api-aarch64.cc251 VIXL_CHECK(!AreConsecutive(b26, b28, NoVReg, b29)); in TEST()
256 VIXL_CHECK(AreConsecutive(b26, b27, NoVReg, NoVReg)); in TEST()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dra-allocatable.ll56 @b26 = external global i32*
180 %53 = load i32*, i32** @b26, align 4
/external/llvm/test/CodeGen/Mips/
Dra-allocatable.ll56 @b26 = external global i32*
180 %53 = load i32*, i32** @b26, align 4
/external/dng_sdk/source/
Ddng_bad_pixels.cpp1348 int32 b26 = p2 [6 * cs]; in FixSingleColumn() local
1432 est5 = b26 + b62; in FixSingleColumn()
1434 grad5 = Abs_int32 (b26 - b62) + in FixSingleColumn()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/X86/
Darith-sub.ll357 …%b26 = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16, i32 0, i64 26), align 2
389 %r26 = sub i16 %a26, %b26
540 %b26 = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 0, i64 26), align 1
604 %r26 = sub i8 %a26, %b26
Darith-add.ll357 …%b26 = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16, i32 0, i64 26), align 2
389 %r26 = add i16 %a26, %b26
540 %b26 = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 0, i64 26), align 1
604 %r26 = add i8 %a26, %b26
Darith-mul.ll424 …%b26 = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16, i32 0, i64 26), align 2
456 %r26 = mul i16 %a26, %b26
607 %b26 = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 0, i64 26), align 1
671 %r26 = mul i8 %a26, %b26
Dshift-shl.ll464 …%b26 = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16, i32 0, i64 26), align 2
496 %r26 = shl i16 %a26, %b26
647 %b26 = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 0, i64 26), align 1
711 %r26 = shl i8 %a26, %b26
Dshift-lshr.ll512 …%b26 = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16, i32 0, i64 26), align 2
544 %r26 = lshr i16 %a26, %b26
695 %b26 = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 0, i64 26), align 1
759 %r26 = lshr i8 %a26, %b26
Dshift-ashr.ll563 …%b26 = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16, i32 0, i64 26), align 2
595 %r26 = ashr i16 %a26, %b26
746 %b26 = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 0, i64 26), align 1
810 %r26 = ashr i8 %a26, %b26
/external/arm-optimized-routines/test/testcases/directed/
Drred3.tst40 func=rred op1=505f5c94.39332b26 result=3cdc948f.5662deec.41f res2=00000001 errno=0
101 func=rred op1=5242b730.ea42040b result=bc8cc751.840f8f82.b26 res2=00000001 errno=0
/external/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td242 def B26 : AArch64Reg<26, "b26">, DwarfRegNum<[90]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64RegisterInfo.td261 def B26 : AArch64Reg<26, "b26">, DwarfRegNum<[90]>;

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