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Searched refs:bgec (Results 1 – 25 of 25) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/
Dinvalid.s295 …bgec $0, $2, 12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instru…
296 bgec $2, $2, 12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: registers must be different
297 bgec $2, $4, -131076 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
298 bgec $2, $4, -131071 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
299 bgec $2, $4, 131072 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
300 bgec $2, $4, 131071 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
Dvalid.s33 bgec $3,$4, 16 # CHECK: bgec $3, $4, 16 # encoding: [0xf4,0x83,0x00,0x04]
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt26 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
27 0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
Dvalid-mips32r6.txt156 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
157 0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt27 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
28 0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
Dvalid-mips32r6.txt166 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
167 0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt24 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
25 0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
Dvalid-mips64r6.txt175 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
176 0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt24 0x40 0x00 0x43 0x58 # CHECK: bgec $2, $3, 260
25 0xfa 0xff 0x43 0x58 # CHECK: bgec $2, $3, -20
Dvalid-mips64r6.txt185 0x58 0x43 0x00 0x40 # CHECK: bgec $2, $3, 260
186 0x58 0x43 0xff 0xfa # CHECK: bgec $2, $3, -20
/external/llvm/test/MC/Mips/micromips32r6/
Dvalid.s24 bgec $3,$4, 16 # CHECK: bgec $3, $4, 16 # encoding: [0xe4,0x83,0x00,0x08]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td81 class BGEC64_DESC : CMP_BC_DESC_BASE<"bgec", brtarget, GPR64Opnd>;
DMicroMips32r6InstrInfo.td68 class BGEC_MMR6_ENC : CMP_BRANCH_2R_OFF16_FM_MMR6<"bgec", 0b111101>,
329 class BGEC_MMR6_DESC : CMP_CBR_2R_MMR6_DESC_BASE<"bgec", brtarget_lsl2_mm,
DMips32r6InstrInfo.td434 class BGEC_DESC : CMP_BC_DESC_BASE<"bgec", brtarget, GPR32Opnd>;
/external/v8/src/mips/
Dassembler-mips.h723 void bgec(Register rs, Register rt, int16_t offset);
724 inline void bgec(Register rs, Register rt, Label* L) { in bgec() function
725 bgec(rs, rt, shifted_branch_offset(L)); in bgec()
Dmacro-assembler-mips.cc2986 bgec(rs, scratch, offset); in BranchShortHelperR6()
3023 bgec(scratch, rs, offset); in BranchShortHelperR6()
Dassembler-mips.cc1627 void Assembler::bgec(Register rs, Register rt, int16_t offset) { in bgec() function in v8::internal::Assembler
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt43 0xe4 0x83 0x00 0x08 # CHECK: bgec $3, $4, 16
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/
Dvalid.txt43 0xf4 0x83 0x00 0x04 # CHECK: bgec $3, $4, 20
/external/v8/src/mips64/
Dassembler-mips64.h733 void bgec(Register rs, Register rt, int16_t offset);
734 inline void bgec(Register rs, Register rt, Label* L) { in bgec() function
735 bgec(rs, rt, shifted_branch_offset(L)); in bgec()
Dmacro-assembler-mips64.cc3484 bgec(rs, scratch, offset); in BranchShortHelperR6()
3521 bgec(scratch, rs, offset); in BranchShortHelperR6()
Dassembler-mips64.cc1607 void Assembler::bgec(Register rs, Register rt, int16_t offset) { in bgec() function in v8::internal::Assembler
/external/llvm/lib/Target/Mips/
DMicroMips32r6InstrInfo.td59 class BGEC_MMR6_ENC : CMP_BRANCH_2R_OFF16_FM_MMR6<"bgec", 0b111001>;
280 class BGEC_MMR6_DESC : CMP_CBR_2R_MMR6_DESC_BASE<"bgec", brtarget_mm,
DMips32r6InstrInfo.td395 class BGEC_DESC : CMP_BC_DESC_BASE<"bgec", brtarget, GPR32Opnd>;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4852 "beqzc16\005beqzl\003bge\004bgec\004bgel\004bgeu\005bgeuc\005bgeul\004bg"
5306 …{ 996 /* bgec */, Mips::BGEC, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__JumpTarget1_2, Feature_HasS…
5307 …{ 996 /* bgec */, Mips::BGEC_MMR6, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__JumpTarget1_2, Feature…
5308 …{ 996 /* bgec */, Mips::BGEC64, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__JumpTarget1_2, Feature_Ha…
8186 …{ Feature_HasStdEnc|Feature_HasMips32r6|Feature_NotInMicroMips, 996 /* bgec */, MCK_GPR32AsmReg, 3…
8187 …{ Feature_HasStdEnc|Feature_HasMips32r6|Feature_NotInMicroMips, 996 /* bgec */, MCK_JumpTarget, 4 …
8188 { Feature_InMicroMips|Feature_HasMips32r6, 996 /* bgec */, MCK_GPR32AsmReg, 3 /* 0, 1 */ },
8189 { Feature_InMicroMips|Feature_HasMips32r6, 996 /* bgec */, MCK_JumpTarget, 4 /* 2 */ },
8190 …{ Feature_HasStdEnc|Feature_IsGP64bit|Feature_HasMips64r6, 996 /* bgec */, MCK_GPR64AsmReg, 3 /* 0…
8191 …{ Feature_HasStdEnc|Feature_IsGP64bit|Feature_HasMips64r6, 996 /* bgec */, MCK_JumpTarget, 4 /* 2 …