| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/compactbranches/ |
| D | empty-block.mir | 6 # CHECK: blezc
|
| D | compact-branch-implicit-def.mir | 56 # CHECK: blezc
|
| D | compact-branches.ll | 107 ; CHECK: blezc
|
| D | compact-branches-64.ll | 102 ; CHECK: blezc
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/ |
| D | invalid.s | 331 …blezc $0, 12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand ($zero) for instru…
332 blezc $2, -131076 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
333 blezc $2, -131071 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
334 blezc $2, 131072 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch target out of range
335 blezc $2, 131071 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: branch to misaligned address
|
| D | valid.s | 426 blezc $2, 256 # CHECK: blezc $2, 256 # encoding: [0xf4,0x40,0x00,0x40]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/longbranch/ |
| D | compact-branches-long-branch.ll | 45 ; CHECK: blezc
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6-el.txt | 39 0x40 0x00 0x05 0x58 # CHECK: blezc $5, 260
40 0xfa 0xff 0x05 0x58 # CHECK: blezc $5, -20
|
| D | valid-mips32r6.txt | 154 0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
155 0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6-el.txt | 40 0x40 0x00 0x05 0x58 # CHECK: blezc $5, 260
41 0xfa 0xff 0x05 0x58 # CHECK: blezc $5, -20
|
| D | valid-mips32r6.txt | 164 0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
165 0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 39 0x40 0x00 0x05 0x58 # CHECK: blezc $5, 260
40 0xfa 0xff 0x05 0x58 # CHECK: blezc $5, -20
|
| D | valid-mips64r6.txt | 173 0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
174 0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 39 0x40 0x00 0x05 0x58 # CHECK: blezc $5, 260
40 0xfa 0xff 0x05 0x58 # CHECK: blezc $5, -20
|
| D | valid-mips64r6.txt | 183 0x58 0x05 0x00 0x40 # CHECK: blezc $5, 260
184 0x58 0x05 0xff 0xfa # CHECk: blezc $5, -20
|
| /external/llvm/test/CodeGen/Mips/compactbranches/ |
| D | compact-branches.ll | 105 ; CHECK: blezc
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 89 class BLEZC64_DESC : CMP_CBR_RT_Z_DESC_BASE<"blezc", brtarget, GPR64Opnd>;
|
| D | MicroMips32r6InstrInfo.td | 80 class BLEZC_MMR6_ENC : CMP_BRANCH_1R_RT_OFF16_FM_MMR6<"blezc", 0b111101>,
313 class BLEZC_MMR6_DESC : CMP_CBR_RT_Z_MMR6_DESC_BASE<"blezc", brtarget_lsl2_mm,
|
| D | Mips32r6InstrInfo.td | 445 class BLEZC_DESC : CMP_CBR_RT_Z_DESC_BASE<"blezc", brtarget, GPR32Opnd>;
|
| /external/v8/src/mips/ |
| D | assembler-mips.h | 742 void blezc(Register rt, int16_t offset);
743 inline void blezc(Register rt, Label* L) { in blezc() function
744 blezc(rt, shifted_branch_offset(L)); in blezc()
|
| D | macro-assembler-mips.cc | 2978 blezc(scratch, offset); in BranchShortHelperR6()
3018 blezc(rs, offset); in BranchShortHelperR6()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
| D | valid.txt | 351 0xf4 0x40 0x00 0x40 # CHECK: blezc $2, 260
|
| /external/v8/src/mips64/ |
| D | assembler-mips64.h | 752 void blezc(Register rt, int16_t offset);
753 inline void blezc(Register rt, Label* L) { in blezc() function
754 blezc(rt, shifted_branch_offset(L)); in blezc()
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips32r6InstrInfo.td | 406 class BLEZC_DESC : CMP_CBR_RT_Z_DESC_BASE<"blezc", brtarget, GPR32Opnd>;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenAsmMatcher.inc | 4858 "\005bleul\004blez\007blezalc\005blezc\005blezl\003blt\004bltc\004bltl\004"
5378 …{ 1300 /* blezc */, Mips::BLEZC, Convert__GPR32AsmReg1_0__JumpTarget1_1, Feature_HasStdEnc|Feature…
5379 …{ 1300 /* blezc */, Mips::BLEZC_MMR6, Convert__GPR32AsmReg1_0__JumpTarget1_1, Feature_InMicroMips|…
5380 …{ 1300 /* blezc */, Mips::BLEZC64, Convert__GPR64AsmReg1_0__JumpTarget1_1, Feature_HasStdEnc|Featu…
8310 …{ Feature_HasStdEnc|Feature_HasMips32r6|Feature_NotInMicroMips, 1300 /* blezc */, MCK_GPR32AsmReg,…
8311 …{ Feature_HasStdEnc|Feature_HasMips32r6|Feature_NotInMicroMips, 1300 /* blezc */, MCK_JumpTarget, …
8312 { Feature_InMicroMips|Feature_HasMips32r6, 1300 /* blezc */, MCK_GPR32AsmReg, 1 /* 0 */ },
8313 { Feature_InMicroMips|Feature_HasMips32r6, 1300 /* blezc */, MCK_JumpTarget, 2 /* 1 */ },
8314 …{ Feature_HasStdEnc|Feature_IsGP64bit|Feature_HasMips64r6, 1300 /* blezc */, MCK_GPR64AsmReg, 1 /*…
8315 …{ Feature_HasStdEnc|Feature_IsGP64bit|Feature_HasMips64r6, 1300 /* blezc */, MCK_JumpTarget, 2 /* …
|