| /external/pdfium/third_party/lcms/src/ |
| D | cmscam02.c | 103 CAM02COLOR XYZtoCAT02(CAM02COLOR clr) in XYZtoCAT02() argument
105 clr.RGB[0] = (clr.XYZ[0] * 0.7328) + (clr.XYZ[1] * 0.4296) + (clr.XYZ[2] * -0.1624); in XYZtoCAT02()
106 clr.RGB[1] = (clr.XYZ[0] * -0.7036) + (clr.XYZ[1] * 1.6975) + (clr.XYZ[2] * 0.0061); in XYZtoCAT02()
107 clr.RGB[2] = (clr.XYZ[0] * 0.0030) + (clr.XYZ[1] * 0.0136) + (clr.XYZ[2] * 0.9834); in XYZtoCAT02()
109 return clr; in XYZtoCAT02()
113 CAM02COLOR ChromaticAdaptation(CAM02COLOR clr, cmsCIECAM02* pMod) in ChromaticAdaptation() argument
118 clr.RGBc[i] = ((pMod -> adoptedWhite.XYZ[1] * in ChromaticAdaptation()
120 (1.0 - pMod->D)) * clr.RGB[i]; in ChromaticAdaptation()
123 return clr; in ChromaticAdaptation()
128 CAM02COLOR CAT02toHPE(CAM02COLOR clr) in CAT02toHPE() argument
[all …]
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| /external/swiftshader/third_party/SPIRV-Tools/source/ |
| D | print.cpp | 21 clr::reset::operator const char*() { return "\x1b[0m"; } in operator const char*()
23 clr::grey::operator const char*() { return "\x1b[1;30m"; } in operator const char*()
25 clr::red::operator const char*() { return "\x1b[31m"; } in operator const char*()
27 clr::green::operator const char*() { return "\x1b[32m"; } in operator const char*()
29 clr::yellow::operator const char*() { return "\x1b[33m"; } in operator const char*()
31 clr::blue::operator const char*() { return "\x1b[34m"; } in operator const char*()
56 clr::reset::operator const char*() { in operator const char*()
64 clr::grey::operator const char*() { in operator const char*()
72 clr::red::operator const char*() { in operator const char*()
80 clr::green::operator const char*() { in operator const char*()
[all …]
|
| D | disassemble.cpp | 92 if (color_) out_.get() << spvtools::clr::reset{print_}; in ResetColor()
96 if (color_) out_.get() << spvtools::clr::grey{print_}; in SetGrey()
100 if (color_) out_.get() << spvtools::clr::blue{print_}; in SetBlue()
104 if (color_) out_.get() << spvtools::clr::yellow{print_}; in SetYellow()
108 if (color_) out_.get() << spvtools::clr::red{print_}; in SetRed()
112 if (color_) out_.get() << spvtools::clr::green{print_}; in SetGreen()
|
| /external/deqp-deps/SPIRV-Tools/source/ |
| D | print.cpp | 21 clr::reset::operator const char*() { return "\x1b[0m"; } in operator const char*()
23 clr::grey::operator const char*() { return "\x1b[1;30m"; } in operator const char*()
25 clr::red::operator const char*() { return "\x1b[31m"; } in operator const char*()
27 clr::green::operator const char*() { return "\x1b[32m"; } in operator const char*()
29 clr::yellow::operator const char*() { return "\x1b[33m"; } in operator const char*()
31 clr::blue::operator const char*() { return "\x1b[34m"; } in operator const char*()
56 clr::reset::operator const char*() { in operator const char*()
64 clr::grey::operator const char*() { in operator const char*()
72 clr::red::operator const char*() { in operator const char*()
80 clr::green::operator const char*() { in operator const char*()
[all …]
|
| D | disassemble.cpp | 92 if (color_) out_.get() << spvtools::clr::reset{print_}; in ResetColor()
96 if (color_) out_.get() << spvtools::clr::grey{print_}; in SetGrey()
100 if (color_) out_.get() << spvtools::clr::blue{print_}; in SetBlue()
104 if (color_) out_.get() << spvtools::clr::yellow{print_}; in SetYellow()
108 if (color_) out_.get() << spvtools::clr::red{print_}; in SetRed()
112 if (color_) out_.get() << spvtools::clr::green{print_}; in SetGreen()
|
| /external/u-boot/arch/x86/include/asm/arch-quark/ |
| D | msg_port.h | 108 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
111 & ~(clr)) | (set))
113 #define msg_port_clrbits(port, reg, clr) \ argument
114 msg_port_generic_clrsetbits(normal, port, reg, clr, 0)
117 #define msg_port_clrsetbits(port, reg, clr, set) \ argument
118 msg_port_generic_clrsetbits(normal, port, reg, clr, set)
120 #define msg_port_alt_clrbits(port, reg, clr) \ argument
121 msg_port_generic_clrsetbits(alt, port, reg, clr, 0)
124 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ argument
125 msg_port_generic_clrsetbits(alt, port, reg, clr, set)
[all …]
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| /external/mesa3d/src/gallium/drivers/etnaviv/ |
| D | etnaviv_blt.c | 208 struct blt_clear_op clr = {}; in etna_blit_clear_color_blt() local
209 clr.dest.addr.bo = res->bo; in etna_blit_clear_color_blt()
210 clr.dest.addr.offset = surf->surf.offset; in etna_blit_clear_color_blt()
211 clr.dest.addr.flags = ETNA_RELOC_WRITE; in etna_blit_clear_color_blt()
212 clr.dest.bpp = util_format_get_blocksize(surf->base.format); in etna_blit_clear_color_blt()
213 clr.dest.stride = surf->surf.stride; in etna_blit_clear_color_blt()
218 clr.dest.tiling = res->layout; in etna_blit_clear_color_blt()
219 clr.dest.cache_mode = TS_CACHE_MODE_128; /* TODO: cache modes */ in etna_blit_clear_color_blt()
222 clr.dest.use_ts = 1; in etna_blit_clear_color_blt()
223 clr.dest.ts_addr.bo = res->ts_bo; in etna_blit_clear_color_blt()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/ |
| D | inst-clr.s | 6 clr r2
7 clr r12
8 clr r5
9 clr r0
11 ; CHECK: clr r2 ; encoding: [0x22,0x24]
12 ; CHECK: clr r12 ; encoding: [0xcc,0x24]
13 ; CHECK: clr r5 ; encoding: [0x55,0x24]
14 ; CHECK: clr r0 ; encoding: [0x00,0x24]
|
| /external/u-boot/arch/arm/include/asm/arch-rockchip/ |
| D | hardware.h | 9 #define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set)) argument
11 #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) argument
15 #define rk_clrsetreg(addr, clr, set) \ argument
16 writel(((clr) | (set)) << 16 | (set), addr)
17 #define rk_clrreg(addr, clr) writel((clr) << 16, addr) argument
|
| /external/u-boot/board/samsung/odroid/ |
| D | odroid.c | 95 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local
151 clr = CORE_RATIO(7) | COREM0_RATIO(7) | COREM1_RATIO(7) | in board_clock_init()
155 clrsetbits_le32(&clk->div_cpu0, clr, set); in board_clock_init()
167 clr = COPY_RATIO(7) | HPM_RATIO(7) | CORES_RATIO(7); in board_clock_init()
170 clrsetbits_le32(&clk->div_cpu1, clr, set); in board_clock_init()
223 clr = ACP_RATIO(7) | ACP_PCLK_RATIO(7) | DPHY_RATIO(7) | in board_clock_init()
240 clrsetbits_le32(&clk->div_dmc0, clr, set); in board_clock_init()
247 clr = G2D_ACP_RATIO(15) | C2C_RATIO(7) | PWI_RATIO(15) | in board_clock_init()
263 clrsetbits_le32(&clk->div_dmc1, clr, set); in board_clock_init()
270 clr = UART0_SEL(15) | UART1_SEL(15) | UART2_SEL(15) | in board_clock_init()
[all …]
|
| /external/u-boot/drivers/net/ |
| D | pic32_eth.c | 63 writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr); in pic32_mii_init()
77 writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */ in pic32_mii_init()
83 writel(EMAC_RMII_RESET, &emac_p->supp.clr); in pic32_mii_init()
141 writel(EMAC_FULLDUP, &emac_p->cfg2.clr); in pic32_mac_adjust_link()
150 writel(EMAC_RMII_SPD100, &emac_p->supp.clr); in pic32_mac_adjust_link()
196 writel(EMAC_RMII_SPD100, &emac_p->supp.clr); in pic32_mac_init()
238 writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr); in pic32_ctrl_reset()
248 writel(0xffffffff, &ectl_p->irq.clr); in pic32_ctrl_reset()
251 writel(0xffffffff, &ectl_p->txst.clr); in pic32_ctrl_reset()
252 writel(0xffffffff, &ectl_p->rxst.clr); in pic32_ctrl_reset()
[all …]
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| /external/u-boot/drivers/video/ |
| D | console_rotate.c | 14 static int console_set_row_1(struct udevice *dev, uint row, int clr) in console_set_row_1() argument
30 *dst++ = clr; in console_set_row_1()
39 *dst++ = clr; in console_set_row_1()
48 *dst++ = clr; in console_set_row_1()
146 static int console_set_row_2(struct udevice *dev, uint row, int clr) in console_set_row_2() argument
161 *dst++ = clr; in console_set_row_2()
170 *dst++ = clr; in console_set_row_2()
179 *dst++ = clr; in console_set_row_2()
273 static int console_set_row_3(struct udevice *dev, uint row, int clr) in console_set_row_3() argument
288 *dst++ = clr; in console_set_row_3()
[all …]
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| D | console_truetype.c | 124 static int console_truetype_set_row(struct udevice *dev, uint row, int clr) in console_truetype_set_row() argument
139 *dst++ = clr; in console_truetype_set_row()
148 *dst++ = clr; in console_truetype_set_row()
157 *dst++ = clr; in console_truetype_set_row()
317 int xend, int yend, int clr) in console_truetype_erase() argument
333 *dst++ = clr; in console_truetype_erase()
342 *dst++ = clr; in console_truetype_erase()
351 *dst++ = clr; in console_truetype_erase()
|
| D | console_normal.c | 16 static int console_normal_set_row(struct udevice *dev, uint row, int clr) in console_normal_set_row() argument
30 *dst++ = clr; in console_normal_set_row()
39 *dst++ = clr; in console_normal_set_row()
48 *dst++ = clr; in console_normal_set_row()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/ |
| D | zext.ll | 7 ; CHECK: clr r25
14 ; clr R25
18 ; CHECK: clr r25
24 ; clr R25
|
| D | mul.ll | 6 ; CHECK: clr r1
19 ; CHECK: clr r1
22 ; CHECK: clr r1
|
| D | interrupts.ll | 10 ; CHECK: clr r0
26 ; CHECK: clr r0
|
| /external/u-boot/common/ |
| D | lcd_console_rotation.c | 31 static inline void console_setrow90(struct console_t *pcons, u32 row, int clr) in console_setrow90() argument
40 *dst-- = clr; in console_setrow90()
86 static inline void console_setrow180(struct console_t *pcons, u32 row, int clr) in console_setrow180() argument
94 *dst++ = clr; in console_setrow180()
133 static inline void console_setrow270(struct console_t *pcons, u32 row, int clr) in console_setrow270() argument
141 *dst++ = clr; in console_setrow270()
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| /external/u-boot/drivers/spi/ |
| D | bcm63xx_hsspi.c | 142 uint32_t clr, set; in bcm63xx_hsspi_activate_cs() local
153 clr = SPI_PFL_SIG_LAUNCHRIS_MASK | in bcm63xx_hsspi_activate_cs()
167 clrsetbits_be32(priv->regs + SPI_PFL_SIG_REG(plat->cs), clr, set); in bcm63xx_hsspi_activate_cs()
171 clr = 0; in bcm63xx_hsspi_activate_cs()
175 clr |= BIT(plat->cs); in bcm63xx_hsspi_activate_cs()
181 clr |= BIT(!plat->cs); in bcm63xx_hsspi_activate_cs()
185 clrsetbits_be32(priv->regs + SPI_CTL_REG, clr, set); in bcm63xx_hsspi_activate_cs()
|
| /external/u-boot/drivers/gpio/ |
| D | pic32_gpio.c | 57 writel(mask, &priv->regs->port.clr); in pic32_gpio_set_value()
81 writel(mask, &priv->regs->ansel.clr); in pic32_gpio_direction_input()
93 writel(mask, &priv->regs->ansel.clr); in pic32_gpio_direction_output()
94 writel(mask, &priv->regs->tris.clr); in pic32_gpio_direction_output()
|
| /external/zlib/src/examples/ |
| D | gzjoin.c | 279 local void gzcopy(char *name, int clr, unsigned long *crc, unsigned long *tot, in gzcopy() argument
314 if (last && clr) in gzcopy()
354 if (last && clr) in gzcopy()
367 if (last && clr) in gzcopy()
381 if (pos == 0 || !clr) in gzcopy()
420 if (!clr) { in gzcopy()
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| /external/toybox/lib/ |
| D | args.c | 147 struct opts *clr; in gotflag() local
151 for (clr=gof->opts, i=1; clr; clr = clr->next, i<<=1) in gotflag()
152 if (clr->arg && (i & toys.optflags & opt->dex[0])) *clr->arg = 0; in gotflag()
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| /external/mesa3d/src/mesa/sparc/ |
| D | sparc_clip.S | 92 clr %l2
93 clr %l0
160 clr %g3 ! IEU0
181 clr %l2
182 clr %l0
230 clr %g3 ! IEU0
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| D | xform.S | 72 clr %o1
144 clr %o1
187 clr %o1
241 clr %o1
289 clr %o1
352 clr %o1
403 clr %o1
454 clr %o1
499 clr %o1
529 clr %o1
[all …]
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| /external/u-boot/include/ |
| D | video_console.h | 127 int (*set_row)(struct udevice *dev, uint row, int clr);
195 int vidconsole_set_row(struct udevice *dev, uint row, int clr);
|