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Searched refs:clrbits_be32 (Results 1 – 25 of 93) sorted by relevance

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/external/u-boot/arch/mips/mach-ath79/
Dreset.c87 clrbits_be32(rregs + AR933X_RESET_REG_BOOTSTRAP, BIT(17)); in eth_init_ar933x()
97 clrbits_be32(rregs + AR933X_RESET_REG_RESET_MODULE, mask); in eth_init_ar933x()
130 clrbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask); in eth_init_ar934x()
149 clrbits_be32(rregs + AR934X_RESET_REG_RESET_MODULE, mask); in eth_init_qca953x()
177 clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE, in usb_reset_ar933x()
180 clrbits_be32(reset_regs + AR933X_RESET_REG_RESET_MODULE, in usb_reset_ar933x()
193 clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, in usb_reset_ar934x()
196 clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, in usb_reset_ar934x()
199 clrbits_be32(reset_regs + AR934X_RESET_REG_RESET_MODULE, in usb_reset_ar934x()
219 clrbits_be32(reset_regs + QCA953X_RESET_REG_RESET_MODULE, in usb_reset_qca953x()
[all …]
/external/u-boot/board/freescale/b4860qds/
Db4860qds.c604 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
607 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in calibrate_pll()
637 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
654 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in check_pll_locks()
657 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
663 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
679 clrbits_be32(&srds_regs->bank[pll_num].rstctl, in check_pll_locks()
684 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
690 clrbits_be32(&srds_regs->bank[pll_num].pllcr1, in check_pll_locks()
697 clrbits_be32(&srds_regs->bank[pll_num].pllcr0, in check_pll_locks()
[all …]
/external/u-boot/board/gdsys/p1022/
Dcontrolcenterd.c95 clrbits_be32(&gur->pmuxcr, 0x00000300); in board_early_init_f()
104 clrbits_be32(&gur->pmuxcr2, 0x001F8000); in board_early_init_f()
111 clrbits_be32(&pgpio->gpdat, 0x00200000); in board_early_init_f()
115 clrbits_be32(&pgpio->gpdat, 0x00200000); in board_early_init_f()
122 clrbits_be32(&pgpio->gpdat, 0x00100000); in board_early_init_f()
217 clrbits_be32(&pgpio->gpdat, 0x00000400); in hw_watchdog_reset()
236 clrbits_be32(&pgpio->gpdat, 0x00080000); in board_early_init_r()
280 clrbits_be32(&pgpio->gpdat, 0x00080000); in board_early_init_r()
/external/u-boot/board/freescale/m5275evb/
Dm5275evb.c63 clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD); in dram_init()
70 clrbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_IPALL); in dram_init()
80 clrbits_be32(&sdp->sdmr, MCF_SDRAMC_SDMR_CMD); in dram_init()
81 clrbits_be32(&sdp->sdcr, MCF_SDRAMC_SDCR_MODE_EN); in dram_init()
/external/u-boot/drivers/net/
Dmpc8xx_fec.c318 clrbits_be32(&immr->im_cpm.cp_cptr, mask); in fec_100Mbps()
329 clrbits_be32(&fecp->fec_r_cntrl, FEC_RCNTRL_DRT); in fec_full_duplex()
340 clrbits_be32(&fecp->fec_x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */ in fec_half_duplex()
381 clrbits_be32(&immr->im_cpm.cp_pbdir, 0x00001001); in fec_pin_init()
388 clrbits_be32(&immr->im_cpm.cp_peso, 0x00000003); in fec_pin_init()
390 clrbits_be32(&immr->im_cpm.cp_cptr, 0x00000100); in fec_pin_init()
403 clrbits_be32(&immr->im_cpm.cp_pbdir, 0x00000001); in fec_pin_init()
406 clrbits_be32(&immr->im_cpm.cp_cptr, 0x00000050); in fec_pin_init()
447 clrbits_be32(&immr->im_cpm.cp_peso, 0x000087fc); in fec_pin_init()
450 clrbits_be32(&immr->im_cpm.cp_cptr, 0x00000080); in fec_pin_init()
[all …]
Dtsec.c121 clrbits_be32(&regs->hash.gaddr0 + whichreg, value); in tsec_mcast_addr()
372 clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS); in tsec_halt()
379 clrbits_be32(&regs->maccfg1, MACCFG1_TX_EN | MACCFG1_RX_EN); in tsec_halt()
423 clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS); in redundant_init()
456 clrbits_be32(&regs->maccfg1, MACCFG1_RX_EN); in redundant_init()
465 clrbits_be32(&regs->rctrl, 0x8); in redundant_init()
467 clrbits_be32(&regs->maccfg1, MACCFG1_LOOPBACK); in redundant_init()
522 clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS); in startup_tsec()
736 clrbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); in tsec_initialize()
839 clrbits_be32(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); in tsec_probe()
/external/u-boot/arch/m68k/cpu/mcf52x2/
Dinterrupts.c41 clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK); in dtimer_intr_setup()
71 clrbits_be32(&intp->imrl0, 0x00000001); in dtimer_intr_setup()
72 clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK); in dtimer_intr_setup()
Dcpu_init.c241 clrbits_be32(par, 0x00180000); in uart_port_conf()
245 clrbits_be32(par, 0x00000003); in uart_port_conf()
246 clrbits_be32(par, 0xFFFFFFFC); in uart_port_conf()
413 clrbits_be32(&gpio->gpio_pbcnt, in uart_port_conf()
419 clrbits_be32(&gpio->gpio_pdcnt, in uart_port_conf()
/external/u-boot/board/freescale/p1_p2_rdb_pc/
Dp1_p2_rdb_pc.c156 clrbits_be32(&par_io[GPIO_DDR_RST_PORT].cpdat, GPIO_DDR_RST_DATA); in board_gpio_init()
160 clrbits_be32(&par_io[GPIO_DDR_RST_PORT].cpdir1, GPIO_2BIT_MASK); in board_gpio_init()
184 clrbits_be32(&pgpio->gpdat, 0x00200000); in board_gpio_init()
188 clrbits_be32(&pgpio->gpdir, 0x00200000); in board_gpio_init()
211 clrbits_be32(&gur->sdhcdcr, SDHCDCR_CD_INV); in board_early_init_f()
213 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); in board_early_init_f()
/external/u-boot/arch/powerpc/cpu/mpc8xx/
Dinterrupts.c69 clrbits_be32(&immr->im_siu_conf.sc_simask, 0xFFFF0000 >> irq); in external_interrupt()
122 clrbits_be32(&immr->im_cpic.cpic_cimr, 1 << vec); in cpm_interrupt()
177 clrbits_be32(&immr->im_cpic.cpic_cimr, 1 << vec); in irq_free_handler()
182 clrbits_be32(&immr->im_siu_conf.sc_simask, 1 << (31 - vec)); in irq_free_handler()
/external/u-boot/arch/mips/mach-ath79/ar934x/
Dclk.c87 clrbits_be32(pll_reg_base + 0x8, BIT(30)); in ar934x_srif_pll_cfg()
94 clrbits_be32(pll_reg_base + 0x8, BIT(30)); in ar934x_srif_pll_cfg()
197 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()
199 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()
201 clrbits_be32(pll_regs + AR934X_PLL_CPU_DDR_CLK_CTRL_REG, in ar934x_pll_init()
/external/u-boot/arch/m68k/cpu/mcf523x/
Dinterrupts.c30 clrbits_be32(&intp->imrl0, INTC_IPRL_INT0); in dtimer_intr_setup()
31 clrbits_be32(&intp->imrl0, CONFIG_SYS_TMRINTR_MASK); in dtimer_intr_setup()
/external/u-boot/drivers/net/fm/
Ddtsec.c72 clrbits_be32(&regs->rctrl, RCTRL_GRS); in dtsec_enable_mac()
75 clrbits_be32(&regs->tctrl, TCTRL_GTS); in dtsec_enable_mac()
89 clrbits_be32(&regs->maccfg1, MACCFG1_RXTX_EN); in dtsec_disable_mac()
/external/u-boot/drivers/gpio/
Dmpc8xxx_gpio.c62 clrbits_be32(&base->gpdat, gpios); in mpc8xxx_gpio_set_in()
64 clrbits_be32(&base->gpdir, gpios); in mpc8xxx_gpio_set_in()
69 clrbits_be32(&base->gpdat, gpios); in mpc8xxx_gpio_set_low()
97 clrbits_be32(&base->gpodr, gpios); in mpc8xxx_gpio_open_drain_off()
Dbcm6345_gpio.c36 clrbits_be32(priv->reg_data, BIT(offset)); in bcm6345_gpio_set_value()
45 clrbits_be32(dirout, BIT(offset)); in bcm6345_gpio_set_direction()
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dfsl_corenet_serdes.c228 clrbits_be32(&regs->lane[idx].gcr0, SRDS_GCR0_RRST); in __serdes_reset_rx()
356 clrbits_be32(&gur->devdisr, devdisr); in p4080_erratum_serdes8()
357 clrbits_be32(&gur->devdisr2, devdisr2); in p4080_erratum_serdes8()
429 clrbits_be32(&regs->bank[FSL_SRDS_BANK_1].pllcr1, in p4080_erratum_serdes_a005()
437 clrbits_be32(&regs->bank[FSL_SRDS_BANK_1].pllcr1, in p4080_erratum_serdes_a005()
452 clrbits_be32(&regs->bank[bank].pllcr1, in p4080_erratum_serdes_a005()
Dcpu_init.c69 clrbits_be32(&usb_phy->pllprg[1], in usb_single_source_clk_configure()
234 clrbits_be32(&cpc->cpchdbcr0, CPC_HDBCR0_CDQ_SPEC_DIS); in disable_cpc_sram()
425 clrbits_be32(plldadcr1, 0x02000001); in fsl_erratum_a007212_workaround()
427 clrbits_be32(plldadcr2, 0x02000001); in fsl_erratum_a007212_workaround()
429 clrbits_be32(plldadcr3, 0x02000001); in fsl_erratum_a007212_workaround()
432 clrbits_be32(dpdovrcr4, 0xe0000000); in fsl_erratum_a007212_workaround()
609 clrbits_be32(&l2cache->l2errdis, in l2cache_init()
614 clrbits_be32(&l2cache->l2ctl, in l2cache_init()
/external/u-boot/board/freescale/bsc9131rdb/
Dbsc9131rdb.c29 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42); in board_early_init_f()
32 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43); in board_early_init_f()
/external/u-boot/board/freescale/p1010rdb/
Dp1010rdb.c148 clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK); in config_board_mux()
186 clrbits_be32(&gur->pmuxcr, PMUXCR1_IFC_MASK); in config_board_mux()
523 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN1_TDM | in misc_init_r()
529 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_CAN2_UART | in misc_init_r()
533 clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_GPIO); in misc_init_r()
/external/u-boot/drivers/ddr/fsl/
Dmpc85xx_ddr_gen3.c445 clrbits_be32(&ddr->debug[2], 0x400); in fsl_ddr_set_memctl_regs()
450 clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_ODT_CFG_MASK); in fsl_ddr_set_memctl_regs()
480 clrbits_be32(&ddr->debug[0], 0x10000); in fsl_ddr_set_memctl_regs()
519 clrbits_be32(&ecm->eebacr, 10000000); in fsl_ddr_set_memctl_regs()
544 clrbits_be32(&ddr->sdram_cfg, 0x2); in fsl_ddr_set_memctl_regs()
550 clrbits_be32(&ddr->sdram_cfg_2, SDRAM_CFG2_FRC_SR); in fsl_ddr_set_memctl_regs()
/external/u-boot/board/esd/vme8349/
Dpci.c89 clrbits_be32(&immr->gpio[1].dir, GPIO2_V_SCON); in pci_init_board()
95 clrbits_be32(&immr->gpio[1].dat, GPIO2_L_RESET_EN_N); in pci_init_board()
/external/u-boot/board/freescale/bsc9132qds/
Dbsc9132qds.c290 clrbits_be32(&gur->pmuxcr3, in misc_init_r()
310 clrbits_be32(&gur->pmuxcr, in misc_init_r()
324 clrbits_be32(&gur->pmuxcr3, in misc_init_r()
/external/u-boot/drivers/phy/
Dbcm6368-usbh-phy.c58 clrbits_be32(priv->regs + USBH_SETUP_REG, hw->setup_clr); in bcm6368_usbh_init()
64 clrbits_be32(priv->regs + USBH_PLL_REG, hw->pll_clr); in bcm6368_usbh_init()
/external/u-boot/arch/powerpc/cpu/mpc8xxx/
Dsrio.c148 clrbits_be32(&srds_regs->lane[idx].gcr0, in srio_erratum_a004034()
182 clrbits_be32((void *)&srio_regs->impl.port[port].pcr, in srio_erratum_a004034()
185 clrbits_be32((void *)&srio_regs->lp_serial in srio_erratum_a004034()
/external/u-boot/arch/m68k/cpu/mcf532x/
Dspeed.c200 clrbits_be32(&sdram->ctrl, SDRAMC_SDCR_CKE); in clock_pll()
217 clrbits_be32(&pll->pcr, ~PLL_PCR_FBDIV_UNMASK); in clock_pll()

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