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Searched refs:cntr5clk (Results 1 – 5 of 5) sorted by relevance

/external/u-boot/arch/arm/dts/
Dsocfpga_arria10_socdk_sdmmc_handoff.dtsi83 cntr5clk-cnt = <900>; /* Field: cntr5clk.cnt */
111 cntr5clk-cnt = <499>; /* Field: cntr5clk.cnt */
112 cntr5clk-src = <1>; /* Field: cntr5clk.src */
/external/u-boot/arch/arm/mach-socfpga/
Dclock_manager_s10.c123 writel(0xff, &clock_manager_base->main_pll.cntr5clk); in cm_basic_init()
131 writel(0xff, &clock_manager_base->per_pll.cntr5clk); in cm_basic_init()
142 writel(cfg->main_pll_cntr5clk, &clock_manager_base->main_pll.cntr5clk); in cm_basic_init()
150 writel(cfg->per_pll_cntr5clk, &clock_manager_base->per_pll.cntr5clk); in cm_basic_init()
Dclock_manager_arria10.c745 writel(main_cfg->cntr5clk_cnt, &clock_manager_base->main_pll.cntr5clk); in cm_full_cfg()
778 &clock_manager_base->per_pll.cntr5clk); in cm_full_cfg()
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dclock_manager_s10.h84 u32 cntr5clk; member
110 u32 cntr5clk; member
Dclock_manager_arria10.h25 u32 cntr5clk; member
51 u32 cntr5clk; member