Searched refs:cntr6clk (Results 1 – 5 of 5) sorted by relevance
124 writel(0xff, &clock_manager_base->main_pll.cntr6clk); in cm_basic_init()132 writel(0xff, &clock_manager_base->per_pll.cntr6clk); in cm_basic_init()143 writel(cfg->main_pll_cntr6clk, &clock_manager_base->main_pll.cntr6clk); in cm_basic_init()151 writel(cfg->per_pll_cntr6clk, &clock_manager_base->per_pll.cntr6clk); in cm_basic_init()311 u32 clock = readl(&clock_manager_base->per_pll.cntr6clk); in cm_get_mmc_controller_clk_hz()318 clock /= 1 + (readl(&clock_manager_base->main_pll.cntr6clk) & in cm_get_mmc_controller_clk_hz()324 clock /= 1 + (readl(&clock_manager_base->per_pll.cntr6clk) & in cm_get_mmc_controller_clk_hz()
747 writel(main_cfg->cntr6clk_cnt, &clock_manager_base->main_pll.cntr6clk); in cm_full_cfg()782 &clock_manager_base->per_pll.cntr6clk); in cm_full_cfg()1096 clk_input = readl(&clock_manager_base->per_pll.cntr6clk); in cm_get_mmc_controller_clk_hz()1103 clk_hz /= 1 + (readl(&clock_manager_base->main_pll.cntr6clk) & in cm_get_mmc_controller_clk_hz()1109 clk_hz /= 1 + (readl(&clock_manager_base->per_pll.cntr6clk) & in cm_get_mmc_controller_clk_hz()
84 cntr6clk-cnt = <900>; /* Field: cntr6clk.cnt */113 cntr6clk-cnt = <9>; /* Field: cntr6clk.cnt */114 cntr6clk-src = <1>; /* Field: cntr6clk.src */
85 u32 cntr6clk; member111 u32 cntr6clk; member
26 u32 cntr6clk; member52 u32 cntr6clk; member