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Searched refs:conv0 (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/Transforms/InstSimplify/
DAndOrXor.ll261 %conv0 = zext i1 %cmp0 to i32
264 %and = and i32 %conv0, %conv1
275 %conv0 = zext <4 x i1> %cmp0 to <4 x i32>
278 %and = and <4 x i32> %conv0, %conv1
289 %conv0 = sext i1 %cmp0 to i5
292 %and = and i5 %conv0, %conv1
303 %conv0 = bitcast <3 x i1> %cmp0 to i3
306 %and = and i3 %conv0, %conv1
322 %conv0 = zext i1 %cmp0 to i16
325 %and = and i16 %conv0, %conv1
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Darm-cgp-signed.ll11 %conv0 = zext i16 %load to i32
13 %cmp = icmp eq i32 %conv0, %conv1
DlongMAC.ll268 %conv0 = sext i16 %b to i32
270 %mul = mul nsw i32 %conv0, %conv1
300 %conv0 = ashr i32 %t, 16
302 %mul = mul nsw i32 %conv0, %conv1
329 %conv0 = ashr i32 %a, 16
331 %mul = mul nsw i32 %conv1, %conv0
Darm-cgp-phis-calls-ret.ll205 %conv0 = zext i16 %0 to i32
207 %call = tail call arm_aapcs_vfpcc i32 @dummy(i32 %conv0, i32 %conv1)
Darm-cgp-icmps.ll183 %conv0 = trunc i32 %add0 to i16
184 %sub0 = sub i16 0, %conv0
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/
DAndOrXor.ll477 %conv0 = zext i1 %cmp0 to i32
480 %and = and i32 %conv0, %conv1
491 %conv0 = zext <4 x i1> %cmp0 to <4 x i32>
494 %and = and <4 x i32> %conv0, %conv1
505 %conv0 = sext i1 %cmp0 to i5
508 %and = and i5 %conv0, %conv1
519 %conv0 = bitcast <3 x i1> %cmp0 to i3
522 %and = and i3 %conv0, %conv1
538 %conv0 = zext i1 %cmp0 to i16
541 %and = and i16 %conv0, %conv1
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/NewGVN/
Dpr17732.ll21 %conv0 = sext i8 %0 to i32
23 %and = and i32 %conv0, %conv1
/external/llvm/test/Transforms/GVN/
Dpr17732.ll22 %conv0 = sext i8 %0 to i32
24 %and = and i32 %conv0, %conv1
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/GVN/
Dpr17732.ll22 %conv0 = sext i8 %0 to i32
24 %and = and i32 %conv0, %conv1
/external/libaom/libaom/av1/common/x86/
Dav1_convolve_scale_sse4.c155 const __m128i conv0 = convolve_16_8(src0, coeff0716); in vfilter8() local
161 const __m128i conv01 = _mm_hadd_epi32(conv0, conv1); in vfilter8()
387 const __m128i conv0 = convolve_16_8(src0, coeff0716); in highbd_vfilter8() local
393 const __m128i conv01 = _mm_hadd_epi32(conv0, conv1); in highbd_vfilter8()
/external/llvm/test/CodeGen/Mips/Fast-ISel/
Dlogopm.ll27 %conv0 = trunc i8 %0 to i1
29 %and0 = and i1 %conv1, %conv0
98 %conv0 = trunc i8 %0 to i1
100 %or0 = or i1 %conv1, %conv0
167 %conv0 = trunc i8 %0 to i1
169 %xor0 = xor i1 %conv1, %conv0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/Fast-ISel/
Dlogopm.ll27 %conv0 = trunc i8 %0 to i1
29 %and0 = and i1 %conv1, %conv0
98 %conv0 = trunc i8 %0 to i1
100 %or0 = or i1 %conv1, %conv0
167 %conv0 = trunc i8 %0 to i1
169 %xor0 = xor i1 %conv1, %conv0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dfp-move-02.ll280 %conv0 = bitcast i64 %add0 to double
281 %mul0 = fmul double %conv0, %factor
359 %conv0 = bitcast double %mul0 to i64
360 %add0 = add i64 %conv0, %bias
/external/llvm/test/CodeGen/SystemZ/
Dfp-move-02.ll280 %conv0 = bitcast i64 %add0 to double
281 %mul0 = fmul double %conv0, %factor
359 %conv0 = bitcast double %mul0 to i64
360 %add0 = add i64 %conv0, %bias
/external/tensorflow/tensorflow/core/kernels/
Dnn_ops_test.cc278 BM_ConvFloatFwd(32, 5, 5, 1248, 128, 1, 1, 1, SAME, conv0);
394 BM_ConvFloatBkInAndFilter(32, 5, 5, 1248, 128, 1, 1, 1, SAME, conv0);
646 BM_ConvFloatDepthwiseFwd(32, 112, 112, 3, 8, 24, 3, 3, 1, SAME, conv0);
710 BM_ConvFloatDepthwiseBk(32, 112, 112, 3, 8, 24, 3, 3, 1, SAME, conv0);