| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | testComparesllltuc.ll | 19 %conv3 = zext i1 %cmp to i64
20 ret i64 %conv3
32 %conv3 = sext i1 %cmp to i64
33 ret i64 %conv3
44 %conv3 = zext i1 %cmp to i8
45 store i8 %conv3, i8* @glob, align 1
57 %conv3 = sext i1 %cmp to i8
58 store i8 %conv3, i8* @glob, align 1
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| D | testComparesllltus.ll | 19 %conv3 = zext i1 %cmp to i64
20 ret i64 %conv3
32 %conv3 = sext i1 %cmp to i64
33 ret i64 %conv3
43 %conv3 = zext i1 %cmp to i16
44 store i16 %conv3, i16* @glob, align 2
56 %conv3 = sext i1 %cmp to i16
57 store i16 %conv3, i16* @glob, align 2
|
| D | testComparesllless.ll | 20 %conv3 = zext i1 %cmp to i64
21 ret i64 %conv3
33 %conv3 = sext i1 %cmp to i64
34 ret i64 %conv3
49 %conv3 = zext i1 %cmp to i16
50 store i16 %conv3, i16* @glob, align 2
66 %conv3 = sext i1 %cmp to i16
67 store i16 %conv3, i16* @glob, align 2
|
| D | testCompareslllesc.ll | 20 %conv3 = zext i1 %cmp to i64
21 ret i64 %conv3
33 %conv3 = sext i1 %cmp to i64
34 ret i64 %conv3
49 %conv3 = zext i1 %cmp to i8
50 store i8 %conv3, i8* @glob, align 1
66 %conv3 = sext i1 %cmp to i8
67 store i8 %conv3, i8* @glob, align 1
|
| D | testComparesllgesc.ll | 19 %conv3 = zext i1 %cmp to i64
20 ret i64 %conv3
32 %conv3 = sext i1 %cmp to i64
33 ret i64 %conv3
48 %conv3 = zext i1 %cmp to i8
49 store i8 %conv3, i8* @glob, align 1
65 %conv3 = sext i1 %cmp to i8
66 store i8 %conv3, i8* @glob, align 1
|
| D | testComparesllgess.ll | 19 %conv3 = zext i1 %cmp to i64
20 ret i64 %conv3
32 %conv3 = sext i1 %cmp to i64
33 ret i64 %conv3
48 %conv3 = zext i1 %cmp to i16
49 store i16 %conv3, i16* @glob, align 2
65 %conv3 = sext i1 %cmp to i16
66 store i16 %conv3, i16* @glob, align 2
|
| D | testComparesllgtuc.ll | 18 %conv3 = zext i1 %cmp to i64
19 ret i64 %conv3
30 %conv3 = sext i1 %cmp to i64
31 ret i64 %conv3
68 %conv3 = zext i1 %cmp to i8
69 store i8 %conv3, i8* @glob, align 1
80 %conv3 = sext i1 %cmp to i8
81 store i8 %conv3, i8* @glob, align 1
|
| D | testComparesllgeus.ll | 14 %conv3 = zext i1 %cmp to i64
15 ret i64 %conv3
27 %conv3 = sext i1 %cmp to i64
28 ret i64 %conv3
62 %conv3 = zext i1 %cmp to i16
63 store i16 %conv3, i16* @glob
76 %conv3 = sext i1 %cmp to i16
77 store i16 %conv3, i16* @glob
|
| D | testComparesigeuc.ll | 63 %conv3 = zext i1 %cmp to i8
64 store i8 %conv3, i8* @glob
77 %conv3 = sext i1 %cmp to i8
78 store i8 %conv3, i8* @glob
92 %conv3 = zext i1 %cmp to i8
93 store i8 %conv3, i8* @glob
105 %conv3 = sext i1 %cmp to i8
106 store i8 %conv3, i8* @glob
|
| D | testComparesigeus.ll | 62 %conv3 = zext i1 %cmp to i16
63 store i16 %conv3, i16* @glob
76 %conv3 = sext i1 %cmp to i16
77 store i16 %conv3, i16* @glob
91 %conv3 = zext i1 %cmp to i16
92 store i16 %conv3, i16* @glob
104 %conv3 = sext i1 %cmp to i16
105 store i16 %conv3, i16* @glob
|
| D | testComparesllgeuc.ll | 14 %conv3 = zext i1 %cmp to i64
15 ret i64 %conv3
27 %conv3 = sext i1 %cmp to i64
28 ret i64 %conv3
62 %conv3 = zext i1 %cmp to i8
63 store i8 %conv3, i8* @glob
76 %conv3 = sext i1 %cmp to i8
77 store i8 %conv3, i8* @glob
|
| D | testComparesllleus.ll | 14 %conv3 = zext i1 %cmp to i64
15 ret i64 %conv3
27 %conv3 = sext i1 %cmp to i64
28 ret i64 %conv3
65 %conv3 = zext i1 %cmp to i16
66 store i16 %conv3, i16* @glob
79 %conv3 = sext i1 %cmp to i16
80 store i16 %conv3, i16* @glob
|
| D | testComparesllleuc.ll | 14 %conv3 = zext i1 %cmp to i64
15 ret i64 %conv3
27 %conv3 = sext i1 %cmp to i64
28 ret i64 %conv3
65 %conv3 = zext i1 %cmp to i8
66 store i8 %conv3, i8* @glob
79 %conv3 = sext i1 %cmp to i8
80 store i8 %conv3, i8* @glob
|
| D | testComparesllgtus.ll | 19 %conv3 = zext i1 %cmp to i64
20 ret i64 %conv3
32 %conv3 = sext i1 %cmp to i64
33 ret i64 %conv3
73 %conv3 = zext i1 %cmp to i16
74 store i16 %conv3, i16* @glob, align 2
86 %conv3 = sext i1 %cmp to i16
87 store i16 %conv3, i16* @glob, align 2
|
| D | testCompareslleqss.ll | 21 %conv3 = zext i1 %cmp to i64
22 ret i64 %conv3
36 %conv3 = sext i1 %cmp to i64
37 ret i64 %conv3
80 %conv3 = zext i1 %cmp to i16
81 store i16 %conv3, i16* @glob, align 2
99 %conv3 = sext i1 %cmp to i16
100 store i16 %conv3, i16* @glob, align 2
|
| D | testComparesllequc.ll | 21 %conv3 = zext i1 %cmp to i64
22 ret i64 %conv3
36 %conv3 = sext i1 %cmp to i64
37 ret i64 %conv3
80 %conv3 = zext i1 %cmp to i8
81 store i8 %conv3, i8* @glob, align 1
99 %conv3 = sext i1 %cmp to i8
100 store i8 %conv3, i8* @glob, align 1
|
| D | testComparesllequs.ll | 21 %conv3 = zext i1 %cmp to i64
22 ret i64 %conv3
36 %conv3 = sext i1 %cmp to i64
37 ret i64 %conv3
80 %conv3 = zext i1 %cmp to i16
81 store i16 %conv3, i16* @glob, align 2
99 %conv3 = sext i1 %cmp to i16
100 store i16 %conv3, i16* @glob, align 2
|
| D | testCompareslleqsc.ll | 22 %conv3 = zext i1 %cmp to i64
23 ret i64 %conv3
37 %conv3 = sext i1 %cmp to i64
38 ret i64 %conv3
81 %conv3 = zext i1 %cmp to i8
82 store i8 %conv3, i8* @glob, align 1
100 %conv3 = sext i1 %cmp to i8
101 store i8 %conv3, i8* @glob, align 1
|
| /external/llvm/test/Transforms/InstCombine/ |
| D | zext-bool-add-sub.ll | 11 %conv3 = zext i1 %y to i32
12 %conv3.neg = sub i32 0, %conv3
14 %add = add i32 %sub, %conv3.neg
|
| /external/llvm/test/Transforms/LoopStrengthReduce/X86/ |
| D | ivchain-stress-X86.ll | 42 %conv3 = trunc i32 %add to i8
44 store i8 %conv3, i8* %arrayidx4, align 1
60 %conv3.1 = trunc i32 %add.1 to i8
62 store i8 %conv3.1, i8* %arrayidx4.1, align 1
75 %conv3.2 = trunc i32 %add.2 to i8
77 store i8 %conv3.2, i8* %arrayidx4.2, align 1
90 %conv3.3 = trunc i32 %add.3 to i8
92 store i8 %conv3.3, i8* %arrayidx4.3, align 1
|
| /external/llvm/test/CodeGen/ARM/ |
| D | test-sharedidx.ll | 33 %conv3 = trunc i32 %add to i8
35 store i8 %conv3, i8* %arrayidx4, align 1
54 %conv3.1 = trunc i32 %add.1 to i8
56 store i8 %conv3.1, i8* %arrayidx4.1, align 1
69 %conv3.2 = trunc i32 %add.2 to i8
71 store i8 %conv3.2, i8* %arrayidx4.2, align 1
87 %conv3.3 = trunc i32 %add.3 to i8
89 store i8 %conv3.3, i8* %arrayidx4.3, align 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/LoopStrengthReduce/X86/ |
| D | ivchain-stress-X86.ll | 42 %conv3 = trunc i32 %add to i8
44 store i8 %conv3, i8* %arrayidx4, align 1
60 %conv3.1 = trunc i32 %add.1 to i8
62 store i8 %conv3.1, i8* %arrayidx4.1, align 1
75 %conv3.2 = trunc i32 %add.2 to i8
77 store i8 %conv3.2, i8* %arrayidx4.2, align 1
90 %conv3.3 = trunc i32 %add.3 to i8
92 store i8 %conv3.3, i8* %arrayidx4.3, align 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | test-sharedidx.ll | 33 %conv3 = trunc i32 %add to i8
35 store i8 %conv3, i8* %arrayidx4, align 1
54 %conv3.1 = trunc i32 %add.1 to i8
56 store i8 %conv3.1, i8* %arrayidx4.1, align 1
69 %conv3.2 = trunc i32 %add.2 to i8
71 store i8 %conv3.2, i8* %arrayidx4.2, align 1
87 %conv3.3 = trunc i32 %add.3 to i8
89 store i8 %conv3.3, i8* %arrayidx4.3, align 1
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
| D | fp-elim-and-no-fp-elim.ll | 11 %conv3 = fptrunc double %div to float
12 tail call void @foo(float %conv1, float %conv3)
24 %conv3 = fptrunc double %div to float
25 tail call void @foo(float %conv1, float %conv3)
|
| /external/llvm/test/CodeGen/X86/ |
| D | fp-elim-and-no-fp-elim.ll | 11 %conv3 = fptrunc double %div to float
12 tail call void @foo(float %conv1, float %conv3)
24 %conv3 = fptrunc double %div to float
25 tail call void @foo(float %conv1, float %conv3)
|