1; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 2; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 3; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 4; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 5; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 6; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl 7 8@glob = common local_unnamed_addr global i16 0, align 2 9 10; Function Attrs: norecurse nounwind readnone 11define i64 @test_llleus(i16 zeroext %a, i16 zeroext %b) { 12entry: 13 %cmp = icmp ule i16 %a, %b 14 %conv3 = zext i1 %cmp to i64 15 ret i64 %conv3 16; CHECK-LABEL: test_llleus: 17; CHECK: sub [[REG1:r[0-9]+]], r4, r3 18; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63 19; CHECK-NEXT: xori r3, [[REG2]], 1 20; CHECK: blr 21} 22 23; Function Attrs: norecurse nounwind readnone 24define i64 @test_llleus_sext(i16 zeroext %a, i16 zeroext %b) { 25entry: 26 %cmp = icmp ule i16 %a, %b 27 %conv3 = sext i1 %cmp to i64 28 ret i64 %conv3 29; CHECK-LABEL: @test_llleus_sext 30; CHECK: sub [[REG1:r[0-9]+]], r4, r3 31; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63 32; CHECK-NEXT: addi [[REG3:r[0-9]+]], [[REG2]], -1 33; CHECK-NEXT: blr 34} 35 36; Function Attrs: norecurse nounwind readnone 37define i64 @test_llleus_z(i16 zeroext %a) { 38entry: 39 %cmp = icmp ule i16 %a, 0 40 %conv2 = zext i1 %cmp to i64 41 ret i64 %conv2 42; CHECK-LABEL: test_llleus_z: 43; CHECK: cntlzw r3, r3 44; CHECK-NEXT: srwi r3, r3, 5 45; CHECK: blr 46} 47 48; Function Attrs: norecurse nounwind readnone 49define i64 @test_llleus_sext_z(i16 zeroext %a) { 50entry: 51 %cmp = icmp ule i16 %a, 0 52 %conv2 = sext i1 %cmp to i64 53 ret i64 %conv2 54; CHECK-LABEL: @test_llleus_sext_z 55; CHECK: cntlzw [[REG1:r[0-9]+]], r3 56; CHECK-NEXT: srwi [[REG2:r[0-9]+]], [[REG1]], 5 57; CHECK-NEXT: neg r3, [[REG2]] 58; CHECK-NEXT: blr 59} 60 61; Function Attrs: norecurse nounwind 62define void @test_llleus_store(i16 zeroext %a, i16 zeroext %b) { 63entry: 64 %cmp = icmp ule i16 %a, %b 65 %conv3 = zext i1 %cmp to i16 66 store i16 %conv3, i16* @glob 67 ret void 68; CHECK-LABEL: test_llleus_store: 69; CHECK: sub [[REG1:r[0-9]+]], r4, r3 70; CHECK: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63 71; CHECK: xori {{r[0-9]+}}, [[REG2]], 1 72; CHECK: blr 73} 74 75; Function Attrs: norecurse nounwind 76define void @test_llleus_sext_store(i16 zeroext %a, i16 zeroext %b) { 77entry: 78 %cmp = icmp ule i16 %a, %b 79 %conv3 = sext i1 %cmp to i16 80 store i16 %conv3, i16* @glob 81 ret void 82; CHECK-LABEL: @test_llleus_sext_store 83; CHECK: sub [[REG1:r[0-9]+]], r4, r3 84; CHECK: rldicl [[REG2:r[0-9]+]], [[REG1]], 1, 63 85; CHECK: addi [[REG3:r[0-9]+]], [[REG2]], -1 86; CHECK: sth [[REG3]] 87; CHECK: blr 88} 89 90; Function Attrs: norecurse nounwind 91define void @test_llleus_z_store(i16 zeroext %a) { 92entry: 93 %cmp = icmp ule i16 %a, 0 94 %conv2 = zext i1 %cmp to i16 95 store i16 %conv2, i16* @glob 96 ret void 97; CHECK-LABEL: test_llleus_z_store: 98; CHECK: cntlzw r3, r3 99; CHECK: srwi r3, r3, 5 100; CHECK: blr 101} 102 103; Function Attrs: norecurse nounwind 104define void @test_llleus_sext_z_store(i16 zeroext %a) { 105entry: 106 %cmp = icmp ule i16 %a, 0 107 %conv2 = sext i1 %cmp to i16 108 store i16 %conv2, i16* @glob 109 ret void 110; CHECK-LABEL: @test_llleus_sext_z_store 111; CHECK: cntlzw [[REG1:r[0-9]+]], r3 112; CHECK: srwi [[REG2:r[0-9]+]], [[REG1]], 5 113; CHECK: neg [[REG3:r[0-9]+]], [[REG2]] 114; CHECK: sth [[REG3]] 115; CHECK: blr 116} 117 118