/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
D | XCoreInstrFormats.td | 13 class InstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> 18 dag OutOperandList = outs; 19 dag InOperandList = ins; 25 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> 32 class _F3R<dag outs, dag ins, string asmstr, list<dag> pattern> 37 class _FL3R<dag outs, dag ins, string asmstr, list<dag> pattern> 42 class _F2RUS<dag outs, dag ins, string asmstr, list<dag> pattern> 47 class _FL2RUS<dag outs, dag ins, string asmstr, list<dag> pattern> 52 class _FRU6<dag outs, dag ins, string asmstr, list<dag> pattern> 57 class _FLRU6<dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/external/llvm/lib/Target/XCore/ |
D | XCoreInstrFormats.td | 13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern> 18 dag OutOperandList = outs; 19 dag InOperandList = ins; 27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> 36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 61 class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr, 62 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> { 66 class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
D | XCoreInstrFormats.td | 13 class InstXCore<int sz, dag outs, dag ins, string asmstr, list<dag> pattern> 18 dag OutOperandList = outs; 19 dag InOperandList = ins; 27 class PseudoInstXCore<dag outs, dag ins, string asmstr, list<dag> pattern> 36 class _F3R<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 45 class _F3RImm<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 50 class _FL3R<bits<9> opc, dag outs, dag ins, string asmstr, list<dag> pattern> 61 class _FL3RSrcDst<bits<9> opc, dag outs, dag ins, string asmstr, 62 list<dag> pattern> : _FL3R<opc, outs, ins, asmstr, pattern> { 66 class _F2RUS<bits<5> opc, dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrFormatsV60.td | 42 class CVI_VA_Resource<dag outs, dag ins, string asmstr, 43 list<dag> pattern = [], string cstr = "", 48 class CVI_VA_DV_Resource<dag outs, dag ins, string asmstr, 49 list<dag> pattern = [], string cstr = "", 54 class CVI_VX_Resource_long<dag outs, dag ins, string asmstr, 55 list<dag> pattern = [], string cstr = "", 60 class CVI_VX_Resource_late<dag outs, dag ins, string asmstr, 61 list<dag> pattern = [], string cstr = "", 66 class CVI_VX_Resource<dag outs, dag ins, string asmstr, 67 list<dag> pattern = [], string cstr = "", [all …]
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D | HexagonInstrFormats.td | 79 class InstHexagon<dag outs, dag ins, string asmstr, list<dag> pattern, 84 dag OutOperandList = outs; 85 dag InOperandList = ins; 210 class LDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [], 215 class LDInst2<dag outs, dag ins, string asmstr, list<dag> pattern = [], 219 class CONSTLDInst<dag outs, dag ins, string asmstr, list<dag> pattern = [], 225 class LDInstPost<dag outs, dag ins, string asmstr, list<dag> pattern = [], 230 class LD0Inst<dag outs, dag ins, string asmstr, list<dag> pattern = [], 235 class LD1Inst<dag outs, dag ins, string asmstr, list<dag> pattern = [], 243 class STInst<dag outs, dag ins, string asmstr, list<dag> pattern = [], [all …]
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrFormats.td | 54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f, 60 dag OutOperandList = outs; 61 dag InOperandList = ins; 78 dag outs, dag ins, string asmstr, list<dag> pattern> 93 dag outs, dag ins, string asmstr, list<dag> pattern> 97 dag outs, dag ins, string asmstr, list<dag> pattern> 101 dag outs, dag ins, string asmstr, list<dag> pattern> 105 dag outs, dag ins, string asmstr, list<dag> pattern> 109 dag outs, dag ins, string asmstr, list<dag> pattern> 113 dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
D | MSP430InstrFormats.td | 54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f, 60 dag OutOperandList = outs; 61 dag InOperandList = ins; 78 dag outs, dag ins, string asmstr, list<dag> pattern> 93 dag outs, dag ins, string asmstr, list<dag> pattern> 97 dag outs, dag ins, string asmstr, list<dag> pattern> 101 dag outs, dag ins, string asmstr, list<dag> pattern> 105 dag outs, dag ins, string asmstr, list<dag> pattern> 109 dag outs, dag ins, string asmstr, list<dag> pattern> 113 dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430InstrFormats.td | 54 class MSP430Inst<dag outs, dag ins, SizeVal sz, Format f, 60 dag OutOperandList = outs; 61 dag InOperandList = ins; 78 dag outs, dag ins, string asmstr, list<dag> pattern> 93 dag outs, dag ins, string asmstr, list<dag> pattern> 97 dag outs, dag ins, string asmstr, list<dag> pattern> 101 dag outs, dag ins, string asmstr, list<dag> pattern> 105 dag outs, dag ins, string asmstr, list<dag> pattern> 109 dag outs, dag ins, string asmstr, list<dag> pattern> 113 dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrFormats.td | 119 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins, 129 dag OutOperandList = outs; 130 dag InOperandList = ins; 178 class PseudoI<dag oops, dag iops, list<dag> pattern> 183 class I<bits<8> o, Format f, dag outs, dag ins, string asm, 184 list<dag> pattern, Domain d = GenericDomain> 189 class Ii8 <bits<8> o, Format f, dag outs, dag ins, string asm, 190 list<dag> pattern, Domain d = GenericDomain> 195 class Ii8PCRel<bits<8> o, Format f, dag outs, dag ins, string asm, 196 list<dag> pattern> [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrFormats.td | 14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 83 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr, 118 class IXFormMemOp<bits<6> opcode, dag OOL, dag IOL, string asmstr, 123 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 124 InstrItinClass itin, list<dag> pattern> 135 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 152 class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL, 161 dag OOL, dag IOL, string asmstr> 173 dag OOL, dag IOL, string asmstr> 187 dag OOL, dag IOL, string asmstr> [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZInstrFormats.td | 45 class InstSystemZ<bits<16> op, Format f, dag outs, dag ins> : Instruction { 53 dag OutOperandList = outs; 54 dag InOperandList = ins; 57 class I8<bits<8> op, Format f, dag outs, dag ins, string asmstr, 58 list<dag> pattern> 67 class I12<bits<12> op, Format f, dag outs, dag ins, string asmstr, 68 list<dag> pattern> 77 class I16<bits<16> op, Format f, dag outs, dag ins, string asmstr, 78 list<dag> pattern> 84 class RRI<bits<8> op, dag outs, dag ins, string asmstr, list<dag> pattern> [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCInstrFormats.td | 14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 56 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 57 InstrItinClass itin, list<dag> pattern> 68 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 87 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr, 88 InstrItinClass itin, list<dag> pattern> 101 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 102 InstrItinClass itin, list<dag> pattern> 114 class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr, 115 InstrItinClass itin, list<dag> pattern> [all …]
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrFormats.td | 14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 68 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr, 103 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 104 InstrItinClass itin, list<dag> pattern> 115 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 132 class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL, 141 dag OOL, dag IOL, string asmstr> 153 dag OOL, dag IOL, string asmstr> 167 dag OOL, dag IOL, string asmstr> 181 dag OOL, dag IOL, string asmstr, InstrItinClass itin, [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrFormats.td | 257 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins, 267 dag OutOperandList = outs; 268 dag InOperandList = ins; 371 class PseudoI<dag oops, dag iops, list<dag> pattern> 376 class I<bits<8> o, Format f, dag outs, dag ins, string asm, 377 list<dag> pattern, Domain d = GenericDomain> 382 class Ii8<bits<8> o, Format f, dag outs, dag ins, string asm, 383 list<dag> pattern, Domain d = GenericDomain> 388 class Ii8Reg<bits<8> o, Format f, dag outs, dag ins, string asm, 389 list<dag> pattern, Domain d = GenericDomain> [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRInstrFormats.td | 15 class AVRInst<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction 19 dag OutOperandList = outs; 20 dag InOperandList = ins; 28 class AVRInst16<dag outs, dag ins, string asmstr, list<dag> pattern> 37 class AVRInst32<dag outs, dag ins, string asmstr, list<dag> pattern> 53 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern> 70 class FRdRr<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr, 71 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern> 83 class FTST<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr, 84 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern> [all …]
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/external/llvm/lib/Target/AVR/ |
D | AVRInstrFormats.td | 15 class AVRInst<dag outs, dag ins, string asmstr, list<dag> pattern> : Instruction 19 dag OutOperandList = outs; 20 dag InOperandList = ins; 26 class AVRInst16<dag outs, dag ins, string asmstr, list<dag> pattern> 35 class AVRInst32<dag outs, dag ins, string asmstr, list<dag> pattern> 51 class Pseudo<dag outs, dag ins, string asmstr, list<dag> pattern> 68 class FRdRr<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr, 69 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern> 81 class FTST<bits<4> opcode, bits<2> f, dag outs, dag ins, string asmstr, 82 list<dag> pattern> : AVRInst16<outs, ins, asmstr, pattern> [all …]
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/external/llvm/lib/Target/X86/ |
D | X86InstrFormats.td | 220 class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins, 232 dag OutOperandList = outs; 233 dag InOperandList = ins; 335 class PseudoI<dag oops, dag iops, list<dag> pattern> 340 class I<bits<8> o, Format f, dag outs, dag ins, string asm, 341 list<dag> pattern, InstrItinClass itin = NoItinerary, 347 class Ii8 <bits<8> o, Format f, dag outs, dag ins, string asm, 348 list<dag> pattern, InstrItinClass itin = NoItinerary, 354 class Ii8PCRel<bits<8> o, Format f, dag outs, dag ins, string asm, 355 list<dag> pattern, InstrItinClass itin = NoItinerary> [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
D | SparcInstrFormats.td | 10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern, 21 dag OutOperandList = outs; 22 dag InOperandList = ins; 37 class F2<dag outs, dag ins, string asmstr, list<dag> pattern, 49 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern, 59 class F2_2<bits<3> op2Val, bit annul, dag outs, dag ins, string asmstr, 60 list<dag> pattern, InstrItinClass itin = NoItinerary> 70 dag outs, dag ins, string asmstr, list<dag> pattern, 87 class F2_4<bits<3> cond, bit annul, bit pred, dag outs, dag ins, 88 string asmstr, list<dag> pattern, InstrItinClass itin = NoItinerary> [all …]
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/external/llvm/lib/Target/Sparc/ |
D | SparcInstrFormats.td | 10 class InstSP<dag outs, dag ins, string asmstr, list<dag> pattern, 21 dag OutOperandList = outs; 22 dag InOperandList = ins; 37 class F2<dag outs, dag ins, string asmstr, list<dag> pattern, 49 class F2_1<bits<3> op2Val, dag outs, dag ins, string asmstr, list<dag> pattern, 59 class F2_2<bits<3> op2Val, bit annul, dag outs, dag ins, string asmstr, 60 list<dag> pattern, InstrItinClass itin = NoItinerary> 70 dag outs, dag ins, string asmstr, list<dag> pattern, 87 class F2_4<bits<3> cond, bit annul, bit pred, dag outs, dag ins, 88 string asmstr, list<dag> pattern, InstrItinClass itin = NoItinerary> [all …]
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrFormats.td | 262 class ARMInstAlias<string Asm, dag Result, bit EmitPriority = 0> 264 class tInstAlias<string Asm, dag Result, bit EmitPriority = 0> 266 class t2InstAlias<string Asm, dag Result, bit EmitPriority = 0> 268 class VFP2InstAlias<string Asm, dag Result, bit EmitPriority = 0> 270 class VFP2DPInstAlias<string Asm, dag Result, bit EmitPriority = 0> 272 class VFP3InstAlias<string Asm, dag Result, bit EmitPriority = 0> 274 class NEONInstAlias<string Asm, dag Result, bit EmitPriority = 0> 352 class AsmPseudoInst<string asm, dag iops, dag oops = (outs)> 363 class ARMAsmPseudo<string asm, dag iops, dag oops = (outs)> 365 class tAsmPseudo<string asm, dag iops, dag oops = (outs)> [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMInstrFormats.td | 224 class ARMInstAlias<string Asm, dag Result, bit Emit = 0b1> 226 class tInstAlias<string Asm, dag Result, bit Emit = 0b1> 228 class t2InstAlias<string Asm, dag Result, bit Emit = 0b1> 230 class VFP2InstAlias<string Asm, dag Result, bit Emit = 0b1> 232 class VFP3InstAlias<string Asm, dag Result, bit Emit = 0b1> 293 class PseudoInst<dag oops, dag iops, InstrItinClass itin, list<dag> pattern> 304 class ARMPseudoInst<dag oops, dag iops, int sz, InstrItinClass itin, 305 list<dag> pattern> 312 class tPseudoInst<dag oops, dag iops, int sz, InstrItinClass itin, 313 list<dag> pattern> [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
D | dag-functional.td | 7 // CHECK: dag ret = (ops); 11 // CHECK: dag ret = (ops ?:$a, 1:$b, 2); 15 // CHECK: dag ret = (ops (ops ?:$name):$a, (ops 1):$b, (ops "foo"):$c); 19 // CHECK: dag ret = (ops NodeA0:$a, NodeB0:$b); 23 // CHECK: dag ret = (ops NodeA0, NodeB0); 27 // CHECK: dag ret = (ops); 31 // CHECK: dag ret = (ops 1:$a, 2:$b); 35 // CHECK: dag ret1 = (ops ?:$a, ?:$b); 36 // CHECK: dag ret2 = (ops 1, 2); 40 // CHECK: dag d1 = (ops 1, ?:$name1, 2, 3); [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMInstrFormats.td | 265 class ARMInstAlias<string Asm, dag Result, bit EmitPriority = 0> 267 class ARMInstSubst<string Asm, dag Result, bit EmitPriority = 0> 270 class tInstAlias<string Asm, dag Result, bit EmitPriority = 0> 272 class tInstSubst<string Asm, dag Result, bit EmitPriority = 0> 275 class t2InstAlias<string Asm, dag Result, bit EmitPriority = 0> 277 class t2InstSubst<string Asm, dag Result, bit EmitPriority = 0> 280 class VFP2InstAlias<string Asm, dag Result, bit EmitPriority = 0> 282 class VFP2DPInstAlias<string Asm, dag Result, bit EmitPriority = 0> 284 class VFP3InstAlias<string Asm, dag Result, bit EmitPriority = 0> 286 class NEONInstAlias<string Asm, dag Result, bit EmitPriority = 0> [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | Mips16InstrFormats.td | 36 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern, 55 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern, 72 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern, 82 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern, 92 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>: 103 class FI16<bits<5> op, dag outs, dag ins, string asmstr, list<dag> pattern, 118 class FRI16<bits<5> op, dag outs, dag ins, string asmstr, 119 list<dag> pattern, InstrItinClass itin>: 135 class FRR16<bits<5> _funct, dag outs, dag ins, string asmstr, 136 list<dag> pattern, InstrItinClass itin>: [all …]
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/external/llvm/lib/Target/Mips/ |
D | Mips16InstrFormats.td | 36 class MipsInst16_Base<dag outs, dag ins, string asmstr, list<dag> pattern, 55 class MipsInst16<dag outs, dag ins, string asmstr, list<dag> pattern, 72 class MipsInst16_32<dag outs, dag ins, string asmstr, list<dag> pattern, 82 class MipsInst16_EXTEND<dag outs, dag ins, string asmstr, list<dag> pattern, 92 class MipsPseudo16<dag outs, dag ins, string asmstr, list<dag> pattern>: 103 class FI16<bits<5> op, dag outs, dag ins, string asmstr, list<dag> pattern, 118 class FRI16<bits<5> op, dag outs, dag ins, string asmstr, 119 list<dag> pattern, InstrItinClass itin>: 135 class FRR16<bits<5> _funct, dag outs, dag ins, string asmstr, 136 list<dag> pattern, InstrItinClass itin>: [all …]
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