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Searched refs:daui (Results 1 – 12 of 12) sorted by relevance

/external/llvm/test/MC/Mips/micromips64r6/
Dvalid.s19 daui $3, $4, 5 # CHECK: daui $3, $4, 5 # encoding: [0xf0,0x64,0x00,0x05]
/external/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td60 class DAUI_DESC : AUI_DESC_BASE<"daui", GPR64Opnd, II_DAUI>;
DMicroMips64r6InstrInfo.td84 class DAUI_MMR6_DESC : DAUI_MMR6_DESC_BASE<"daui", GPR64Opnd>;
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt99 0x34 0x12 0x62 0x74 # CHECK: daui $3, $2, 4660
Dvalid-mips64r6.txt192 0x74 0x62 0x12 0x34 # CHECK: daui $3, $2, 4660
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips64r6InstrInfo.td62 class DAUI_DESC : AUI_DESC_BASE<"daui", GPR64Opnd, II_DAUI>;
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt100 0x34 0x12 0x43 0x74 # CHECK: daui $3, $2, 4660
Dvalid-mips64r6.txt202 0x74 0x43 0x12 0x34 # CHECK: daui $3, $2, 4660
/external/llvm/test/MC/Disassembler/Mips/micromips64r6/
Dvalid.txt37 0xf0 0x64 0x00 0x05 # CHECK: daui $3, $4, 5
/external/v8/src/mips64/
Dassembler-mips64.cc2328 daui(scratch, src.rm(), static_cast<uint16_t>(offset_high)); in AdjustBaseAndOffset()
2510 void Assembler::daui(Register rt, Register rs, int32_t j) { in daui() function in v8::internal::Assembler
Dassembler-mips64.h882 void daui(Register rt, Register rs, int32_t j);
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4892 "dadd\005daddi\006daddiu\005daddu\004dahi\006dalign\004dati\004daui\010d"
5913 …{ 3124 /* daui */, Mips::DAUI, Convert__GPR64AsmReg1_0__GPR64AsmReg1_1__UImm161_2, Feature_HasStdE…
9064 …{ Feature_HasStdEnc|Feature_HasMips64r6|Feature_NotInMicroMips, 3124 /* daui */, MCK_GPR64AsmReg, …