| /external/u-boot/arch/x86/cpu/broadwell/ |
| D | northbridge.c | 26 dm_pci_write_config8(dev, PAM0, 0x30); in broadwell_northbridge_early_init()
27 dm_pci_write_config8(dev, PAM1, 0x33); in broadwell_northbridge_early_init()
28 dm_pci_write_config8(dev, PAM2, 0x33); in broadwell_northbridge_early_init()
29 dm_pci_write_config8(dev, PAM3, 0x33); in broadwell_northbridge_early_init()
30 dm_pci_write_config8(dev, PAM4, 0x33); in broadwell_northbridge_early_init()
31 dm_pci_write_config8(dev, PAM5, 0x33); in broadwell_northbridge_early_init()
32 dm_pci_write_config8(dev, PAM6, 0x33); in broadwell_northbridge_early_init()
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| D | pch.c | 44 dm_pci_write_config8(dev, ACPI_CNTL, ACPI_EN); in broadwell_pch_early_init()
46 dm_pci_write_config8(dev, GPIO_CNTL, GPIO_EN); in broadwell_pch_early_init()
208 dm_pci_write_config8(dev, 0xa9, 0x46); in pch_pm_init_magic()
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| /external/u-boot/arch/x86/cpu/ivybridge/ |
| D | lpc.c | 35 dm_pci_write_config8(pch, ACPI_CNTL, 0x80); in pch_enable_apic()
78 dm_pci_write_config8(pch, SERIRQ_CNTL, value); in pch_enable_serial_irqs()
80 dm_pci_write_config8(pch, SERIRQ_CNTL, value | (1 << 6)); in pch_enable_serial_irqs()
92 dm_pci_write_config8(pch, PIRQA_ROUT, *ptr++); in pch_pirq_init()
93 dm_pci_write_config8(pch, PIRQB_ROUT, *ptr++); in pch_pirq_init()
94 dm_pci_write_config8(pch, PIRQC_ROUT, *ptr++); in pch_pirq_init()
95 dm_pci_write_config8(pch, PIRQD_ROUT, *ptr++); in pch_pirq_init()
97 dm_pci_write_config8(pch, PIRQE_ROUT, *ptr++); in pch_pirq_init()
98 dm_pci_write_config8(pch, PIRQF_ROUT, *ptr++); in pch_pirq_init()
99 dm_pci_write_config8(pch, PIRQG_ROUT, *ptr++); in pch_pirq_init()
[all …]
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| D | northbridge.c | 171 dm_pci_write_config8(dev, PAM0, 0x30); in sandybridge_setup_northbridge_bars()
172 dm_pci_write_config8(dev, PAM1, 0x33); in sandybridge_setup_northbridge_bars()
173 dm_pci_write_config8(dev, PAM2, 0x33); in sandybridge_setup_northbridge_bars()
174 dm_pci_write_config8(dev, PAM3, 0x33); in sandybridge_setup_northbridge_bars()
175 dm_pci_write_config8(dev, PAM4, 0x33); in sandybridge_setup_northbridge_bars()
176 dm_pci_write_config8(dev, PAM5, 0x33); in sandybridge_setup_northbridge_bars()
177 dm_pci_write_config8(dev, PAM6, 0x33); in sandybridge_setup_northbridge_bars()
195 dm_pci_write_config8(dev, 0xf3, reg8); in bd82x6x_northbridge_early_init()
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| D | sata.c | 108 dm_pci_write_config8(dev, 0x09, 0x80); in bd82x6x_sata_init()
137 dm_pci_write_config8(dev, 0x09, 0x8f); in bd82x6x_sata_init()
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| /external/u-boot/drivers/pci/ |
| D | pci_auto.c | 161 dm_pci_write_config8(dev, PCI_CACHE_LINE_SIZE, in dm_pciauto_setup_device()
163 dm_pci_write_config8(dev, PCI_LATENCY_TIMER, 0x80); in dm_pciauto_setup_device()
184 dm_pci_write_config8(dev, PCI_PRIMARY_BUS, in dm_pciauto_prescan_setup_bridge()
186 dm_pci_write_config8(dev, PCI_SECONDARY_BUS, sub_bus - ctlr->seq); in dm_pciauto_prescan_setup_bridge()
187 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, 0xff); in dm_pciauto_prescan_setup_bridge()
236 dm_pci_write_config8(dev, PCI_IO_BASE, in dm_pciauto_prescan_setup_bridge()
261 dm_pci_write_config8(dev, PCI_SUBORDINATE_BUS, sub_bus - ctlr->seq); in dm_pciauto_postscan_setup_bridge()
296 dm_pci_write_config8(dev, PCI_IO_LIMIT, in dm_pciauto_postscan_setup_bridge()
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| D | pci-uclass.c | 304 int dm_pci_write_config8(struct udevice *dev, int offset, u8 value) in dm_pci_write_config8() function
443 return dm_pci_write_config8(dev, offset, val); in dm_pci_clrset_config8()
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| /external/u-boot/arch/x86/cpu/intel_common/ |
| D | lpc.c | 26 dm_pci_write_config8(pch, 0xdc, reg8); in enable_spi_prefetch()
96 dm_pci_write_config8(dev, bios_ctrl, bios_cntl); in lpc_set_spi_protect()
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| /external/u-boot/drivers/pch/ |
| D | pch7.c | 35 dm_pci_write_config8(dev, BIOS_CTRL, bios_cntl); in pch7_set_spi_protect()
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| /external/u-boot/arch/x86/cpu/ |
| D | irq.c | 114 dm_pci_write_config8(dev->parent, in pirq_assign_irq()
324 dm_pci_write_config8(dev->parent, priv->actl_addr, 0x80); in irq_enable_sci()
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| /external/u-boot/arch/x86/lib/ |
| D | bios_interrupts.c | 190 dm_pci_write_config8(dev, reg, byte); in int1a_handler()
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| /external/u-boot/drivers/i2c/ |
| D | intel_i2c.c | 258 dm_pci_write_config8(dev, HOSTC, HST_EN); in intel_i2c_probe()
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| /external/u-boot/drivers/video/ |
| D | ivybridge_igd.c | 693 dm_pci_write_config8(video_dev, MSAC, reg8); in sandybridge_setup_graphics()
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| /external/u-boot/drivers/bios_emulator/ |
| D | bios.c | 282 dm_pci_write_config8(_BE_env.vgaInfo.pcidev,
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| /external/u-boot/drivers/ata/ |
| D | ahci.c | 466 dm_pci_write_config8(dev, 0x41, 0xa1); in ahci_init_one()
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| /external/u-boot/include/ |
| D | pci.h | 1075 int dm_pci_write_config8(struct udevice *dev, int offset, u8 value);
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