Searched refs:dmultu (Results 1 – 25 of 64) sorted by relevance
123
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | mul-macro-variants.s | 118 # CHECK: dmultu $5, $6 # encoding: [0x00,0xa6,0x00,0x1d]
120 # CHECK-TRAP dmultu $5, $6 # encoding: [0x00,0xa6,0x00,0x1d]
145 # CHECK: dmultu $5, $6 # encoding: [0x00,0xa6,0x00,0x1d]
151 # CHECK-TRAP: dmultu $5, $6 # encoding: [0x00,0xa6,0x00,0x1d]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 13 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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| D | invalid-mips64.s | 17 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 13 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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| D | invalid-mips64.s | 17 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
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| /external/llvm/test/MC/Mips/mips2/ |
| D | invalid-mips3.s | 24 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
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| D | invalid-mips5.s | 24 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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| D | invalid-mips4.s | 25 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips2/ |
| D | invalid-mips3.s | 24 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fea…
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| D | invalid-mips4.s | 25 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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| D | invalid-mips5.s | 24 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU featur…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-el.txt | 90 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
234 0x1d 0x00 0xed 0x02 # CHECK: dmultu $23, $13
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| /external/llvm/test/MC/Disassembler/Mips/mips64/ |
| D | valid-mips64-el.txt | 90 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
230 0x1d 0x00 0xed 0x02 # CHECK: dmultu $23, $13
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| /external/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-mips64r2-el.txt | 96 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
251 0x1d 0x00 0xed 0x02 # CHECK: dmultu $23, $13
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| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | mul.ll | 237 ; GP64-NOT-R6: dmultu $5, $7
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | Mips64InstrInfo.td | 167 def DMULTu : Mul64<0x1d, "dmultu", IIImul>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | mul.ll | 236 ; GP64-NOT-R6: dmultu $5, $7
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r2/ |
| D | valid-mips64r2-el.txt | 97 0x1d 0x00 0xa6 0x00 # CHECK: dmultu $5, $6
256 0x1d 0x00 0xed 0x02 # CHECK: dmultu $23, $13
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips3.s | 28 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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| D | invalid-mips5.s | 26 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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| D | invalid-mips4.s | 27 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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| /external/llvm/test/MC/Mips/mips1/ |
| D | invalid-mips3.s | 28 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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| D | invalid-mips4.s | 27 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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| D | invalid-mips5.s | 26 …dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
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| /external/llvm/test/MC/Mips/mips3/ |
| D | valid.s | 79 dmultu $a1,$a2
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