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Searched refs:getOpSize (Results 1 – 7 of 7) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DSISchedule.td105 def PredIsVGPR32Copy : SchedPredicate<[{TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32}]>;
106 def PredIsVGPR64Copy : SchedPredicate<[{TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32}]>;
DSIInstrInfo.h415 unsigned getOpSize(uint16_t Opcode, unsigned OpNo) const { in getOpSize() function
429 unsigned getOpSize(const MachineInstr &MI, unsigned OpNo) const { in getOpSize() function
DSIShrinkInstructions.cpp144 TII->isLiteralConstant(Src0, TII->getOpSize(MI, Src0Idx))) in foldImmediates()
DSIFoldOperands.cpp317 unsigned OpSize = TII->getOpSize(MI, 1); in runOnMachineFunction()
DSIInstrInfo.cpp1741 if (usesConstantBus(MRI, MO, getOpSize(Opcode, OpIdx))) { in verifyInstruction()
2024 usesConstantBus(MRI, Op, getOpSize(MI, i))) { in isOperandLegal()
3113 if (isLiteralConstant(MI.getOperand(Src0Idx), getOpSize(MI, Src0Idx))) in getInstSizeInBytes()
3120 if (isLiteralConstant(MI.getOperand(Src1Idx), getOpSize(MI, Src1Idx))) in getInstSizeInBytes()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSISchedule.td114 def PredIsVGPR32Copy : SchedPredicate<[{TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) <= 32}]>;
115 def PredIsVGPR64Copy : SchedPredicate<[{TII->isVGPRCopy(*MI) && TII->getOpSize(*MI, 0) > 32}]>;
DSIInstrInfo.h639 unsigned Size = getOpSize(MI, OpIdx); in isInlineConstant()
707 unsigned getOpSize(uint16_t Opcode, unsigned OpNo) const { in getOpSize() function
721 unsigned getOpSize(const MachineInstr &MI, unsigned OpNo) const { in getOpSize() function