/external/llvm/lib/Target/AArch64/ |
D | AArch64Subtarget.cpp | 102 const RegisterBankInfo *AArch64Subtarget::getRegBankInfo() const { in getRegBankInfo() function in AArch64Subtarget 104 return GISel->getRegBankInfo(); in getRegBankInfo()
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D | AArch64Subtarget.h | 150 const RegisterBankInfo *getRegBankInfo() const override;
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D | AArch64TargetMachine.cpp | 202 const RegisterBankInfo *getRegBankInfo() const override { in getRegBankInfo() function
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/external/llvm/include/llvm/CodeGen/GlobalISel/ |
D | GISelAccessor.h | 30 virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr;} in getRegBankInfo() function
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/external/llvm/include/llvm/Target/ |
D | TargetSubtargetInfo.h | 104 virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr; } in getRegBankInfo() function
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | TargetSubtargetInfo.h | 129 virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr; } in getRegBankInfo() function
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64Subtarget.cpp | 185 const RegisterBankInfo *AArch64Subtarget::getRegBankInfo() const { in getRegBankInfo() function in AArch64Subtarget
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D | AArch64Subtarget.h | 195 const RegisterBankInfo *getRegBankInfo() const override;
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D | AArch64CallLowering.cpp | 386 *MF.getSubtarget().getRegBankInfo(), *MIB, MIB->getDesc(), Callee, 0)); in lowerCall()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsSubtarget.cpp | 274 const RegisterBankInfo *MipsSubtarget::getRegBankInfo() const { in getRegBankInfo() function in MipsSubtarget
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D | MipsSubtarget.h | 388 const RegisterBankInfo *getRegBankInfo() const override;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86Subtarget.cpp | 349 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const { in getRegBankInfo() function in X86Subtarget
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D | X86Subtarget.h | 498 const RegisterBankInfo *getRegBankInfo() const override;
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D | X86CallLowering.cpp | 441 *MF.getSubtarget().getRegBankInfo(), *MIB, MIB->getDesc(), Callee, 0)); in lowerCall()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMSubtarget.cpp | 135 const RegisterBankInfo *ARMSubtarget::getRegBankInfo() const { in getRegBankInfo() function in ARMSubtarget
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D | ARMSubtarget.h | 496 const RegisterBankInfo *getRegBankInfo() const override;
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D | ARMCallLowering.cpp | 528 MF, *TRI, MRI, *STI.getInstrInfo(), *STI.getRegBankInfo(), in lowerCall()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUSubtarget.h | 417 const RegisterBankInfo *getRegBankInfo() const override { in getRegBankInfo() function
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
D | RegisterBankInfo.cpp | 558 const RegisterBankInfo *RBI = MF.getSubtarget().getRegBankInfo(); in verify()
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D | RegBankSelect.cpp | 84 RBI = MF.getSubtarget().getRegBankInfo(); in init()
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/external/llvm/lib/CodeGen/GlobalISel/ |
D | RegBankSelect.cpp | 59 RBI = MF.getSubtarget().getRegBankInfo(); in init()
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/external/llvm/lib/CodeGen/MIRParser/ |
D | MIRParser.cpp | 730 const RegisterBankInfo *RBI = MF.getSubtarget().getRegBankInfo(); in initNames2RegBanks()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/MIRParser/ |
D | MIRParser.cpp | 859 const RegisterBankInfo *RBI = MF.getSubtarget().getRegBankInfo(); in initNames2RegBanks()
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