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Searched refs:getSORegOpc (Results 1 – 23 of 23) sorted by relevance

/external/capstone/arch/ARM/
DARMAddressingModes.h115 static inline unsigned getSORegOpc(ARM_AM_ShiftOpc ShOp, unsigned Imm) in getSORegOpc() function
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
DARMAddressingModes.h111 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() function
/external/llvm/lib/Target/ARM/MCTargetDesc/
DARMAddressingModes.h112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() function
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMAddressingModes.h110 inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc() function
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp547 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ARM_AM::lsl, in SelectImmShifterOperand()
565 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectImmShifterOperand()
592 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectRegShifterOperand()
2372 CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, LSB), dl, in tryV6T2BitfieldExtractOp()
2774 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
2793 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
DARMFastISel.cpp2704 unsigned ImmEnc = ImmIsSO ? ARM_AM::getSORegOpc(ShiftAM, Imm) : Imm; in ARMEmitIntExt()
2790 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); in SelectShift()
2793 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0)); in SelectShift()
DARMFrameLowering.cpp272 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsr, NrBitsToZero)))); in emitAligningInstructions()
276 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, NrBitsToZero)))); in emitAligningInstructions()
DARMExpandPseudoInsts.cpp1207 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? in ExpandMI()
1220 .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) in ExpandMI()
DARMBaseInstrInfo.cpp176 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
DARMISelLowering.cpp7548 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
7684 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelDAGToDAG.cpp408 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectImmShifterOperand()
435 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectRegShifterOperand()
1169 Opc = getI32Imm(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal)); in SelectT2ShifterOperandReg()
2485 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
2501 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
DARMExpandPseudoInsts.cpp862 .addImm(ARM_AM::getSORegOpc((Opcode == ARM::MOVsrl_flag ? in ExpandMI()
875 .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0))) in ExpandMI()
DARMBaseInstrInfo.cpp177 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
DARMISelLowering.cpp5785 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
5862 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)))); in EmitSjLjDispatchBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp527 ARM_AM::getSORegOpc(ARM_AM::lsl, PowerOfTwo), Loc, MVT::i32); in SelectImmShifterOperand()
543 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectImmShifterOperand()
570 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal), in SelectRegShifterOperand()
2332 CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, LSB), dl, in tryV6T2BitfieldExtractOp()
2688 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
2707 ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm); in Select()
DARMFastISel.cpp2730 unsigned ImmEnc = ImmIsSO ? ARM_AM::getSORegOpc(ShiftAM, Imm) : Imm; in ARMEmitIntExt()
2818 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); in SelectShift()
2821 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0)); in SelectShift()
DARMFrameLowering.cpp321 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsr, NrBitsToZero)) in emitAligningInstructions()
326 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, NrBitsToZero)) in emitAligningInstructions()
DARMExpandPseudoInsts.cpp1375 .addImm(ARM_AM::getSORegOpc( in ExpandMI()
1388 .addImm(ARM_AM::getSORegOpc(ARM_AM::rrx, 0)) in ExpandMI()
DARMBaseInstrInfo.cpp199 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress()
DARMISelLowering.cpp8512 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)) in EmitSjLjDispatchBlock()
8665 .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2)) in EmitSjLjDispatchBlock()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp2061 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
2072 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); in addRegShiftedImmOperands()
8497 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, 0); in processInstruction()
8528 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, Amt); in processInstruction()
8542 unsigned Shifter = ARM_AM::getSORegOpc(ARM_AM::rrx, 0); in processInstruction()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp1808 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
1819 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); in addRegShiftedImmOperands()
8191 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, 0); in processInstruction()
8222 unsigned Shifter = ARM_AM::getSORegOpc(ShiftTy, Amt); in processInstruction()
8236 unsigned Shifter = ARM_AM::getSORegOpc(ARM_AM::rrx, 0); in processInstruction()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp974 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); in addRegShiftedRegOperands()
982 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, RegShiftedImm.ShiftImm))); in addRegShiftedImmOperands()