| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 2727 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_even, dl, MVT::f64, in LowerF64Op()
2729 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_odd, dl, MVT::f64, in LowerF64Op()
2899 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_even64, dl, MVT::f128, in LowerFNEGorFABS()
2901 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_odd64, dl, MVT::f128, in LowerFNEGorFABS()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 2776 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_even, dl, MVT::f64, in LowerF64Op()
2778 DstReg64 = DAG.getTargetInsertSubreg(SP::sub_odd, dl, MVT::f64, in LowerF64Op()
2933 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_even64, dl, MVT::f128, in LowerFNEGorFABS()
2935 DstReg128 = DAG.getTargetInsertSubreg(SP::sub_odd64, dl, MVT::f128, in LowerFNEGorFABS()
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 799 SDValue getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT,
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 914 return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32, in convertTo()
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| D | SystemZISelLowering.cpp | 2772 In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST()
2785 SDValue In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_r32, DL, in lowerBITCAST()
3083 return DAG.getTargetInsertSubreg(SystemZ::subreg_l32, DL, in lowerOR()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 1091 SDValue getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 1234 SDValue getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 938 return CurDAG->getTargetInsertSubreg(SystemZ::subreg_l32, in convertTo()
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| D | SystemZISelLowering.cpp | 2907 In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST()
2920 SDValue In64 = DAG.getTargetInsertSubreg(SystemZ::subreg_r32, DL, in lowerBITCAST()
3211 return DAG.getTargetInsertSubreg(SystemZ::subreg_l32, DL, in lowerOR()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLoweringHVX.cpp | 826 return DAG.getTargetInsertSubreg(SubIdx, dl, VecTy, VecV, SubV); in insertHvxSubvectorReg()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 3767 VecVal1 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT, in LowerFCOPYSIGN()
3769 VecVal2 = DAG.getTargetInsertSubreg(AArch64::ssub, DL, VecVT, in LowerFCOPYSIGN()
3785 VecVal1 = DAG.getTargetInsertSubreg(AArch64::dsub, DL, VecVT, in LowerFCOPYSIGN()
3787 VecVal2 = DAG.getTargetInsertSubreg(AArch64::dsub, DL, VecVT, in LowerFCOPYSIGN()
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| D | AArch64ISelDAGToDAG.cpp | 1242 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1310 return DAG.getTargetInsertSubreg(AArch64::dsub, DL, WideTy, Undef, V64Reg); in operator ()()
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| D | AArch64ISelLowering.cpp | 4407 VecVal1 = DAG.getTargetInsertSubreg(Idx, DL, VecVT, in LowerFCOPYSIGN()
4409 VecVal2 = DAG.getTargetInsertSubreg(Idx, DL, VecVT, in LowerFCOPYSIGN()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 5173 SelectionDAG::getTargetInsertSubreg(int SRIdx, DebugLoc DL, EVT VT, in getTargetInsertSubreg() function in SelectionDAG
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 6185 SDValue SelectionDAG::getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT, in getTargetInsertSubreg() function in SelectionDAG
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 7372 SDValue SelectionDAG::getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT, in getTargetInsertSubreg() function in SelectionDAG
|