| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMSubtarget.h | 192 bool hasV6T2Ops() const { return HasV6T2Ops; } in hasV6T2Ops() function
241 bool useMovt() const { return UseMovt && hasV6T2Ops(); } in useMovt()
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| D | ARMSubtarget.cpp | 113 UseMovt = hasV6T2Ops(); in ARMSubtarget()
116 UseMovt = DarwinUseMOVT && hasV6T2Ops(); in ARMSubtarget()
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| D | ARMISelDAGToDAG.cpp | 2045 if (!Subtarget->hasV6T2Ops()) in SelectV6T2BitfieldExtractOp()
2166 } else if (TrueVal.getNode()->hasOneUse() && Subtarget->hasV6T2Ops()) { in SelectT2CMOVImmOp()
2193 } else if (Subtarget->hasV6T2Ops() && TrueImm <= 0xffff) { in SelectARMCMOVImmOp()
2199 (Subtarget->hasV6T2Ops() || ARM_AM::isSOImmTwoPartVal(TrueImm))) { in SelectARMCMOVImmOp()
2529 : (Subtarget->hasV6T2Ops() ? ARM::MOVTi16 : 0); in Select()
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| D | ARMCodeEmitter.cpp | 901 if (Subtarget->hasV6T2Ops()) in emitPseudoInstruction()
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| D | ARMExpandPseudoInsts.cpp | 655 if (!STI->hasV6T2Ops() && in ExpandMOV32BitImm()
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| D | ARMFastISel.cpp | 552 if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getSExtValue())) { in ARMMaterializeInt()
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| D | ARMInstrInfo.td | 177 def HasV6T2 : Predicate<"Subtarget->hasV6T2Ops()">,
179 def NoV6T2 : Predicate<"!Subtarget->hasV6T2Ops()">;
219 // FIXME: Eventually this will be just "hasV6T2Ops".
513 if (Subtarget->hasV6T2Ops())
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| D | ARMISelLowering.cpp | 738 if (Subtarget->hasV6T2Ops() || Subtarget->hasNEON()) in ARMTargetLowering()
3350 if (!ST->hasV6T2Ops()) in LowerCTTZ()
6771 if (Subtarget->isThumb1Only() || !Subtarget->hasV6T2Ops()) in PerformORCombine()
8588 if (Subtarget->hasV6T2Ops()) in LowerAsmOperandForConstraint()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 144 assert(hasV6T2Ops() || !hasThumb2()); in initSubtargetFeatures()
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| D | ARMFastISel.cpp | 479 if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getZExtValue())) { in ARMMaterializeInt()
491 if (VT == MVT::i32 && Subtarget->hasV6T2Ops() && CI->isNegative()) { in ARMMaterializeInt()
835 needsLowering = !(Subtarget->hasV6T2Ops() && Addr.Offset < 0 && in ARMSimplifyAddress()
931 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitLoad()
950 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitLoad()
965 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitLoad()
1076 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitStore()
1089 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitStore()
1103 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitStore()
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| D | ARMTargetTransformInfo.cpp | 32 return ST->hasV6T2Ops() ? 2 : 3; in getIntImmCost()
39 return ST->hasV6T2Ops() ? 2 : 3; in getIntImmCost()
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| D | ARMSubtarget.h | 399 bool hasV6T2Ops() const { return HasV6T2Ops; } in hasV6T2Ops() function
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| D | ARMISelDAGToDAG.cpp | 336 if (!Subtarget->hasV6T2Ops()) in PreprocessISelDAG()
478 if (Subtarget->hasV6T2Ops() && Val <= 0xffff) return 1; // MOVW in ConstantMaterializationCost()
485 if (Subtarget->hasV6T2Ops() && Val <= 0xffff) return 1; // MOVW in ConstantMaterializationCost()
2330 if (!Subtarget->hasV6T2Ops()) in tryV6T2BitfieldExtractOp()
2866 : (Subtarget->hasV6T2Ops() ? ARM::MOVTi16 : 0); in Select()
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| D | ARMAsmPrinter.cpp | 575 return (Subtarget->hasV8MBaselineOps() && !Subtarget->hasV6T2Ops()) || in isV8M()
599 } else if (Subtarget->hasV6T2Ops()) in getArchForCPU()
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| D | ARMISelLowering.cpp | 750 if (!Subtarget->isThumb1Only() && Subtarget->hasV6T2Ops()) in ARMTargetLowering()
4682 if (!ST->hasV6T2Ops()) in LowerCTTZ()
7638 } else if (Subtarget->hasV6T2Ops() && isUInt<16>(NumLPads)) { in EmitSjLjDispatchBlock()
9347 if (Subtarget->isThumb1Only() || !Subtarget->hasV6T2Ops()) in PerformORCombine()
10963 if (!Subtarget->isThumb1Only() && Subtarget->hasV6T2Ops()) { in PerformCMOVCombine()
11872 if (Subtarget->hasV6T2Ops()) in LowerAsmOperandForConstraint()
12481 return Subtarget->hasV6T2Ops(); in isCheapToSpeculateCttz()
12485 return Subtarget->hasV6T2Ops(); in isCheapToSpeculateCtlz()
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| D | ARMFrameLowering.cpp | 241 const bool CanUseBFC = AST.hasV6T2Ops() || AST.hasV7Ops(); in emitAligningInstructions()
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| D | ARMExpandPseudoInsts.cpp | 677 if (!STI->hasV6T2Ops() && in ExpandMOV32BitImm()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 474 if (Subtarget->hasV6T2Ops() && isUInt<16>(CI->getZExtValue())) { in ARMMaterializeInt()
486 if (VT == MVT::i32 && Subtarget->hasV6T2Ops() && CI->isNegative()) { in ARMMaterializeInt()
834 needsLowering = !(Subtarget->hasV6T2Ops() && Addr.Offset < 0 && in ARMSimplifyAddress()
931 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitLoad()
950 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitLoad()
965 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitLoad()
1077 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitStore()
1090 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitStore()
1104 if (Addr.Offset < 0 && Addr.Offset > -256 && Subtarget->hasV6T2Ops()) in ARMEmitStore()
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| D | ARMSubtarget.cpp | 188 assert(hasV6T2Ops() || !hasThumb2()); in initSubtargetFeatures()
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| D | ARMTargetTransformInfo.cpp | 71 return ST->hasV6T2Ops() ? 2 : 3; in getIntImmCost()
78 return ST->hasV6T2Ops() ? 2 : 3; in getIntImmCost()
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| D | ARMSubtarget.h | 525 bool hasV6T2Ops() const { return HasV6T2Ops; } in hasV6T2Ops() function
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| D | ARMISelDAGToDAG.cpp | 312 if (!Subtarget->hasV6T2Ops()) in PreprocessISelDAG()
454 if (Subtarget->hasV6T2Ops() && in ConstantMaterializationCost()
463 if (Subtarget->hasV6T2Ops() && Val <= 0xffff) return 1; // MOVW in ConstantMaterializationCost()
2290 if (!Subtarget->hasV6T2Ops()) in tryV6T2BitfieldExtractOp()
2558 } else if (!Subtarget->hasV6T2Ops()) { in SelectCMPZ()
2780 : (Subtarget->hasV6T2Ops() ? ARM::MOVTi16 : 0); in Select()
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| D | ARMISelLowering.cpp | 838 if (!Subtarget->isThumb1Only() && Subtarget->hasV6T2Ops()) in ARMTargetLowering()
5439 if (!ST->hasV6T2Ops()) in LowerCTTZ()
8615 } else if (Subtarget->hasV6T2Ops() && isUInt<16>(NumLPads)) { in EmitSjLjDispatchBlock()
10869 if (Subtarget->isThumb1Only() || !Subtarget->hasV6T2Ops()) in PerformORCombineToBFI()
12600 if (!Subtarget->isThumb1Only() && Subtarget->hasV6T2Ops()) { in PerformCMOVCombine()
13770 if (Subtarget->hasV6T2Ops()) in LowerAsmOperandForConstraint()
14467 return Subtarget->hasV6T2Ops(); in isCheapToSpeculateCttz()
14471 return Subtarget->hasV6T2Ops(); in isCheapToSpeculateCtlz()
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| D | ARMFrameLowering.cpp | 289 const bool CanUseBFC = AST.hasV6T2Ops() || AST.hasV7Ops(); in emitAligningInstructions()
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| D | ARMExpandPseudoInsts.cpp | 834 if (!STI->hasV6T2Ops() && in ExpandMOV32BitImm()
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