| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| D | intel_fbo.c | 60 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in intel_delete_renderbuffer() local
62 assert(irb); in intel_delete_renderbuffer()
64 intel_miptree_release(&irb->mt); in intel_delete_renderbuffer()
65 intel_miptree_release(&irb->singlesample_mt); in intel_delete_renderbuffer()
77 struct intel_renderbuffer *irb) in intel_renderbuffer_downsample() argument
79 if (!irb->need_downsample) in intel_renderbuffer_downsample()
81 intel_miptree_updownsample(brw, irb->mt, irb->singlesample_mt); in intel_renderbuffer_downsample()
82 irb->need_downsample = false; in intel_renderbuffer_downsample()
92 struct intel_renderbuffer *irb) in intel_renderbuffer_upsample() argument
94 assert(!irb->need_downsample); in intel_renderbuffer_upsample()
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| D | intel_fbo.h | 142 struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb; in intel_renderbuffer() local
143 if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) in intel_renderbuffer()
144 return irb; in intel_renderbuffer()
150 intel_renderbuffer_get_mt(struct intel_renderbuffer *irb) in intel_renderbuffer_get_mt() argument
152 if (!irb) in intel_renderbuffer_get_mt()
155 return (irb->align_wa_mt) ? irb->align_wa_mt : irb->mt; in intel_renderbuffer_get_mt()
204 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb);
207 intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb, in intel_renderbuffer_get_tile_offsets() argument
211 if (irb->align_wa_mt) { in intel_renderbuffer_get_tile_offsets()
217 return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer, in intel_renderbuffer_get_tile_offsets()
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| D | intel_pixel_read.c | 84 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in intel_readpixels_tiled_memcpy() local
132 if (!irb->mt || in intel_readpixels_tiled_memcpy()
133 (irb->mt->surf.tiling != ISL_TILING_X && in intel_readpixels_tiled_memcpy()
134 irb->mt->surf.tiling != ISL_TILING_Y0)) { in intel_readpixels_tiled_memcpy()
153 intel_miptree_access_raw(brw, irb->mt, irb->mt_level, irb->mt_layer, false); in intel_readpixels_tiled_memcpy()
155 bo = irb->mt->bo; in intel_readpixels_tiled_memcpy()
169 intel_miptree_get_image_offset(irb->mt, irb->mt_level, irb->mt_layer, in intel_readpixels_tiled_memcpy()
198 format, type, rb->Format, irb->mt->surf.tiling, in intel_readpixels_tiled_memcpy()
206 map + irb->mt->offset, in intel_readpixels_tiled_memcpy()
207 dst_pitch, irb->mt->surf.row_pitch, in intel_readpixels_tiled_memcpy()
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| D | brw_blorp.c | 475 find_miptree(GLbitfield buffer_bit, struct intel_renderbuffer *irb) in find_miptree() argument
477 struct intel_mipmap_tree *mt = irb->mt; in find_miptree()
484 blorp_get_texture_swizzle(const struct intel_renderbuffer *irb) in blorp_get_texture_swizzle() argument
486 return irb->Base.Base._BaseFormat == GL_RGB ? in blorp_get_texture_swizzle()
1134 set_write_disables(const struct intel_renderbuffer *irb, in set_write_disables() argument
1142 const GLenum base_format = irb->Base.Base._BaseFormat; in set_write_disables()
1162 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in do_single_blorp_clear() local
1165 mesa_format format = irb->Base.Base.Format; in do_single_blorp_clear()
1187 if (set_write_disables(irb, ctx->Color.ColorMask[buf], color_write_disable)) in do_single_blorp_clear()
1195 if (irb->Base.Base.Format != irb->mt->format) in do_single_blorp_clear()
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| D | gen6_depth_state.c | 54 const struct intel_renderbuffer *irb = NULL; in gen6_emit_depth_stencil_hiz() local
70 irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); in gen6_emit_depth_stencil_hiz()
71 if (!irb) in gen6_emit_depth_stencil_hiz()
72 irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); in gen6_emit_depth_stencil_hiz()
73 rb = (struct gl_renderbuffer*) irb; in gen6_emit_depth_stencil_hiz()
76 depth = MAX2(irb->layer_count, 1); in gen6_emit_depth_stencil_hiz()
101 const unsigned min_array_element = irb ? irb->mt_layer : 0; in gen6_emit_depth_stencil_hiz()
103 lod = irb ? irb->mt_level - irb->mt->first_level : 0; in gen6_emit_depth_stencil_hiz()
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| D | gen7_misc_state.c | 52 const struct intel_renderbuffer *irb = NULL; in gen7_emit_depth_stencil_hiz() local
63 irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); in gen7_emit_depth_stencil_hiz()
64 if (!irb) in gen7_emit_depth_stencil_hiz()
65 irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); in gen7_emit_depth_stencil_hiz()
66 rb = (struct gl_renderbuffer*) irb; in gen7_emit_depth_stencil_hiz()
69 depth = MAX2(irb->layer_count, 1); in gen7_emit_depth_stencil_hiz()
94 min_array_element = irb ? irb->mt_layer : 0; in gen7_emit_depth_stencil_hiz()
96 lod = irb ? irb->mt_level - irb->mt->first_level : 0; in gen7_emit_depth_stencil_hiz()
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| D | brw_draw.c | 358 const struct intel_renderbuffer *irb = in intel_disable_rb_aux_buffer() local
361 if (irb && irb->mt->bo == tex_mt->bo && in intel_disable_rb_aux_buffer()
362 irb->mt_level >= min_level && in intel_disable_rb_aux_buffer()
363 irb->mt_level < min_level + num_levels) { in intel_disable_rb_aux_buffer()
528 const struct intel_renderbuffer *irb = in brw_predraw_resolve_framebuffer() local
531 if (irb) { in brw_predraw_resolve_framebuffer()
532 intel_miptree_prepare_texture(brw, irb->mt, irb->mt->surf.format, in brw_predraw_resolve_framebuffer()
533 irb->mt_level, 1, in brw_predraw_resolve_framebuffer()
534 irb->mt_layer, irb->layer_count, in brw_predraw_resolve_framebuffer()
542 struct intel_renderbuffer *irb = in brw_predraw_resolve_framebuffer() local
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| D | intel_tex_copy.c | 50 struct intel_renderbuffer *irb, in intel_copy_texsubimage() argument
55 if (!intelImage->mt || !irb || !irb->mt) { in intel_copy_texsubimage()
58 __func__, intelImage->mt, irb, internalFormat); in intel_copy_texsubimage()
73 if (irb->Base.Base.NumSamples != 0) in intel_copy_texsubimage()
87 irb->mt, irb->mt_level, irb->mt_layer, in intel_copy_texsubimage()
88 x, y, irb->Base.Base.Name == 0, in intel_copy_texsubimage()
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| D | gen8_depth_state.c | 151 const struct intel_renderbuffer *irb = NULL; in gen8_emit_depth_stencil_hiz() local
154 irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); in gen8_emit_depth_stencil_hiz()
155 if (!irb) in gen8_emit_depth_stencil_hiz()
156 irb = intel_get_renderbuffer(fb, BUFFER_STENCIL); in gen8_emit_depth_stencil_hiz()
157 rb = (struct gl_renderbuffer *) irb; in gen8_emit_depth_stencil_hiz()
160 depth = MAX2(irb->layer_count, 1); in gen8_emit_depth_stencil_hiz()
197 min_array_element = irb ? irb->mt_layer : 0; in gen8_emit_depth_stencil_hiz()
199 lod = irb ? irb->mt_level - irb->mt->first_level : 0; in gen8_emit_depth_stencil_hiz()
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| D | intel_pixel_bitmap.c | 179 struct intel_renderbuffer *irb; in do_blit_bitmap() local
209 irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]); in do_blit_bitmap()
228 switch (_mesa_get_render_format(ctx, intel_rb_format(irb))) { in do_blit_bitmap()
238 _mesa_get_format_name(irb->mt->format)); in do_blit_bitmap()
259 intel_miptree_access_raw(brw, irb->mt, irb->mt_level, irb->mt_layer, true); in do_blit_bitmap()
291 irb->mt->cpp, in do_blit_bitmap()
295 irb->mt->surf.row_pitch, in do_blit_bitmap()
296 irb->mt->bo, in do_blit_bitmap()
297 irb->mt->offset, in do_blit_bitmap()
298 irb->mt->surf.tiling, in do_blit_bitmap()
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| D | brw_misc_state.c | 126 get_stencil_miptree(struct intel_renderbuffer *irb) in get_stencil_miptree() argument
128 if (!irb) in get_stencil_miptree()
130 if (irb->mt->stencil_mt) in get_stencil_miptree()
131 return irb->mt->stencil_mt; in get_stencil_miptree()
132 return intel_renderbuffer_get_mt(irb); in get_stencil_miptree()
136 rebase_depth_stencil(struct brw_context *brw, struct intel_renderbuffer *irb, in rebase_depth_stencil() argument
143 intel_get_tile_masks(irb->mt->surf.tiling, irb->mt->cpp, in rebase_depth_stencil()
145 assert(!intel_miptree_level_has_hiz(irb->mt, irb->mt_level)); in rebase_depth_stencil()
147 uint32_t tile_x = irb->draw_x & tile_mask_x; in rebase_depth_stencil()
148 uint32_t tile_y = irb->draw_y & tile_mask_y; in rebase_depth_stencil()
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| D | intel_pixel_draw.c | 75 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in do_blit_drawpixels() local
80 mesa_format dst_format = irb->mt->format; in do_blit_drawpixels()
117 irb->mt->format, in do_blit_drawpixels()
129 irb->mt, irb->mt_level, irb->mt_layer, in do_blit_drawpixels()
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| D | brw_wm_surface_state.c | 222 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in gen6_update_renderbuffer_surface() local
223 struct intel_mipmap_tree *mt = irb->mt; in gen6_update_renderbuffer_surface()
227 mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); in gen6_update_renderbuffer_surface()
236 .base_level = irb->mt_level - irb->mt->first_level, in gen6_update_renderbuffer_surface()
238 .base_array_layer = irb->mt_layer, in gen6_update_renderbuffer_surface()
239 .array_len = MAX2(irb->layer_count, 1), in gen6_update_renderbuffer_surface()
853 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in gen4_update_renderbuffer_surface() local
854 struct intel_mipmap_tree *mt = irb->mt; in gen4_update_renderbuffer_surface()
860 mesa_format rb_format = _mesa_get_render_format(ctx, intel_rb_format(irb)); in gen4_update_renderbuffer_surface()
864 intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y); in gen4_update_renderbuffer_surface()
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| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| D | intel_fbo.c | 60 struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, attIndex); in intel_get_rb_region() local
61 if (irb && irb->mt) in intel_get_rb_region()
62 return irb->mt->region; in intel_get_rb_region()
71 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in intel_delete_renderbuffer() local
73 assert(irb); in intel_delete_renderbuffer()
75 intel_miptree_release(&irb->mt); in intel_delete_renderbuffer()
93 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in intel_map_renderbuffer() local
116 intel_miptree_map(intel, irb->mt, irb->mt_level, irb->mt_layer, in intel_map_renderbuffer()
141 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in intel_unmap_renderbuffer() local
152 intel_miptree_unmap(intel, irb->mt, irb->mt_level, irb->mt_layer); in intel_unmap_renderbuffer()
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| D | intel_fbo.h | 87 struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb; in intel_renderbuffer() local
88 if (irb && irb->Base.Base.ClassID == INTEL_RB_CLASS) in intel_renderbuffer()
89 return irb; in intel_renderbuffer()
143 intel_renderbuffer_set_draw_offset(struct intel_renderbuffer *irb);
146 intel_renderbuffer_get_tile_offsets(struct intel_renderbuffer *irb, in intel_renderbuffer_get_tile_offsets() argument
150 return intel_miptree_get_tile_offsets(irb->mt, irb->mt_level, irb->mt_layer, in intel_renderbuffer_get_tile_offsets()
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| D | intel_tex_copy.c | 52 struct intel_renderbuffer *irb, in intel_copy_texsubimage() argument
59 if (!intelImage->mt || !irb || !irb->mt) { in intel_copy_texsubimage()
62 __func__, intelImage->mt, irb, internalFormat); in intel_copy_texsubimage()
68 irb->mt, irb->mt_level, irb->mt_layer, in intel_copy_texsubimage()
69 x, y, irb->Base.Base.Name == 0, in intel_copy_texsubimage()
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| D | intel_pixel_read.c | 90 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in do_blit_readpixels() local
93 !_mesa_format_matches_format_and_type(irb->mt->format, format, type, in do_blit_readpixels()
134 irb->mt->format, in do_blit_readpixels()
140 irb->mt, irb->mt_level, irb->mt_layer, in do_blit_readpixels()
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| D | i830_vtbl.c | 617 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in i830_set_draw_region() local
646 if (irb != NULL) { in i830_set_draw_region()
647 value |= i830_render_target_format_for_mesa_format[intel_rb_format(irb)]; in i830_set_draw_region()
676 idrb && irb && (idrb->draw_x != irb->draw_x || in i830_set_draw_region()
677 idrb->draw_y != irb->draw_y)); in i830_set_draw_region()
679 if (irb) { in i830_set_draw_region()
680 draw_x = irb->draw_x; in i830_set_draw_region()
681 draw_y = irb->draw_y; in i830_set_draw_region()
760 struct intel_renderbuffer *irb; in i830_update_draw_buffer() local
763 irb = intel_renderbuffer(fb->_ColorDrawBuffers[i]); in i830_update_draw_buffer()
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| D | intel_clear.c | 89 struct intel_renderbuffer *irb; in intelClear() local
106 irb = intel_get_renderbuffer(fb, i); in intelClear()
107 if (unlikely(!irb)) { in intelClear()
154 const struct intel_region *irb = intel_get_rb_region(fb, BUFFER_DEPTH); in intelClear() local
157 if (irb->tiling == I915_TILING_Y || tri_mask & BUFFER_BIT_STENCIL) in intelClear()
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| D | intel_pixel_bitmap.c | 182 struct intel_renderbuffer *irb; in do_blit_bitmap() local
212 irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]); in do_blit_bitmap()
231 switch (irb->mt->format) { in do_blit_bitmap()
241 _mesa_get_format_name(irb->mt->format)); in do_blit_bitmap()
289 irb->mt->cpp, in do_blit_bitmap()
293 irb->mt->region->pitch, in do_blit_bitmap()
294 irb->mt->region->bo, in do_blit_bitmap()
296 irb->mt->region->tiling, in do_blit_bitmap()
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| D | i915_vtbl.c | 577 struct intel_renderbuffer *irb = intel_renderbuffer(rb); in i915_set_draw_region() local
606 if (irb != NULL) { in i915_set_draw_region()
607 value |= i915_render_target_format_for_mesa_format[intel_rb_format(irb)]; in i915_set_draw_region()
646 idrb && irb && (idrb->draw_x != irb->draw_x || in i915_set_draw_region()
647 idrb->draw_y != irb->draw_y)); in i915_set_draw_region()
649 if (irb) { in i915_set_draw_region()
650 draw_x = irb->draw_x; in i915_set_draw_region()
651 draw_y = irb->draw_y; in i915_set_draw_region()
753 struct intel_renderbuffer *irb; in i915_update_draw_buffer() local
754 irb = intel_renderbuffer(fb->_ColorDrawBuffers[0]); in i915_update_draw_buffer()
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| D | intel_blit.c | 394 struct intel_renderbuffer *irb; in intelClearWithBlit() local
404 irb = intel_get_renderbuffer(fb, buf); in intelClearWithBlit()
405 if (irb && irb->mt) { in intelClearWithBlit()
406 region = irb->mt->region; in intelClearWithBlit()
415 x1 = cx + irb->draw_x; in intelClearWithBlit()
416 y1 = cy + irb->draw_y; in intelClearWithBlit()
417 x2 = cx + cw + irb->draw_x; in intelClearWithBlit()
418 y2 = cy + ch + irb->draw_y; in intelClearWithBlit()
453 switch (intel_rb_format(irb)) { in intelClearWithBlit()
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| D | intel_screen.c | 122 struct intel_renderbuffer *irb = in aub_dump_bmp() local
125 if (irb && irb->mt) { in aub_dump_bmp()
128 switch (irb->Base.Base.Format) { in aub_dump_bmp()
137 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0); in aub_dump_bmp()
138 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo, in aub_dump_bmp()
139 irb->draw_x, in aub_dump_bmp()
140 irb->draw_y, in aub_dump_bmp()
141 irb->Base.Base.Width, in aub_dump_bmp()
142 irb->Base.Base.Height, in aub_dump_bmp()
144 irb->mt->region->pitch, in aub_dump_bmp()
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| /external/google-breakpad/src/third_party/libdisasm/swig/ |
| D | README | 90 bash# irb
91 irb(main):001:0> require 'x86disasm'
93 irb(main):002:0> X86disasm.version_string()
95 irb(main):003:0> x = X86disasm::X86_Disasm.new
97 irb(main):004:0> x.max_register_string()
99 irb(main):003:0> ^D
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| /external/icu/icu4j/main/classes/core/src/com/ibm/icu/impl/ |
| D | ICUResourceBundle.java | 146 ICUResourceBundle irb = (ICUResourceBundle) r.get(resName); in getFunctionalEquivalent() local
147 defStr = irb.getString(DEFAULT_TAG); in getFunctionalEquivalent()
168 ICUResourceBundle irb = (ICUResourceBundle)r.get(resName); in getFunctionalEquivalent() local
169 /* UResourceBundle urb = */irb.get(kwVal); in getFunctionalEquivalent()
170 fullBase = irb.getULocale(); in getFunctionalEquivalent()
175 defStr = irb.getString(DEFAULT_TAG); in getFunctionalEquivalent()
199 ICUResourceBundle irb = (ICUResourceBundle)r.get(resName); in getFunctionalEquivalent() local
200 ICUResourceBundle urb = (ICUResourceBundle)irb.get(kwVal); in getFunctionalEquivalent()
214 defStr = irb.getString(DEFAULT_TAG); in getFunctionalEquivalent()
259 ICUResourceBundle irb = (ICUResourceBundle) (b.getObject(keyword)); in getKeywordValues() local
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