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Searched refs:isInternalRead (Results 1 – 22 of 22) sorted by relevance

/external/llvm/include/llvm/CodeGen/
DMachineOperand.h307 bool isInternalRead() const { in isInternalRead() function
336 return !isUndef() && !isInternalRead() && (isUse() || getSubReg()); in readsReg()
612 bool isInternalRead = false) {
621 Op.IsInternalRead = isInternalRead;
DMachineInstrBuilder.h402 getInternalReadRegState(RegOp.isInternalRead()) | in getRegState()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DMachineOperand.h420 bool isInternalRead() const { in isInternalRead() function
449 return !isUndef() && !isInternalRead() && (isUse() || getSubReg()); in readsReg()
761 bool isInternalRead = false,
771 Op.IsInternalRead = isInternalRead;
DMachineInstrBuilder.h486 getInternalReadRegState(RegOp.isInternalRead()) | in getRegState()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DRegisterScavenging.cpp720 assert(!MO.isInternalRead() && "Cannot assign inside bundles"); in scavengeFrameVirtualRegsInBlock()
735 assert(!MO.isInternalRead() && "Cannot assign inside bundles"); in scavengeFrameVirtualRegsInBlock()
DMachineInstrBundle.cpp64 if (MO.isReg() && MO.isInternalRead()) in runOnMachineFunction()
DTargetInstrInfo.cpp175 bool Reg1IsInternal = MI.getOperand(Idx1).isInternalRead(); in commuteInstructionImpl()
176 bool Reg2IsInternal = MI.getOperand(Idx2).isInternalRead(); in commuteInstructionImpl()
DRegisterPressure.cpp489 if (!MO.isUndef() && !MO.isInternalRead()) in collectOperand()
521 if (!MO.isUndef() && !MO.isInternalRead()) in collectOperandLanes()
DMachineVerifier.cpp1730 if (MODef.isTied() || MODef.isImplicit() || MODef.isInternalRead() || in checkPHIOps()
1743 if (MO0.isImplicit() || MO0.isInternalRead() || MO0.isEarlyClobber() || in checkPHIOps()
DMachineOperand.cpp735 if (isInternalRead()) in print()
/external/llvm/lib/CodeGen/
DMachineInstrBundle.cpp63 if (MO.isReg() && MO.isInternalRead()) in runOnMachineFunction()
DTargetInstrInfo.cpp153 bool Reg1IsInternal = MI.getOperand(Idx1).isInternalRead(); in commuteInstructionImpl()
154 bool Reg2IsInternal = MI.getOperand(Idx2).isInternalRead(); in commuteInstructionImpl()
DRegisterPressure.cpp462 if (!MO.isUndef() && !MO.isInternalRead()) in collectOperand()
494 if (!MO.isUndef() && !MO.isInternalRead()) in collectOperandLanes()
DMachineInstr.cpp320 isInternalRead() || isEarlyClobber() || isTied()) { in print()
355 if (isInternalRead()) { in print()
DMIRPrinter.cpp761 if (Op.isInternalRead()) in print()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DR600ControlFlowFinalizer.cpp430 if (MO.isReg() && MO.isInternalRead()) in MakeALUClause()
DAMDGPUInstructionSelector.cpp101 MO.isInternalRead()); in getSubOperand64()
/external/llvm/lib/Target/AMDGPU/
DR600ControlFlowFinalizer.cpp414 if (MO.isReg() && MO.isInternalRead()) in MakeALUClause()
/external/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp534 OffsetInternal = MI->getOperand(2).isInternalRead(); in ReduceLoadStore()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp563 OffsetInternal = MI->getOperand(2).isInternalRead(); in ReduceLoadStore()
/external/llvm/lib/Target/Hexagon/
DHexagonSplitDouble.cpp577 Op.isInternalRead()); in createHalfInstr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonSplitDouble.cpp624 Op.isInternalRead()); in createHalfInstr()