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Searched refs:isSSA (Results 1 – 25 of 77) sorted by relevance

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/external/llvm/test/CodeGen/X86/
Dfixup-bw-copy.mir42 isSSA: false
59 isSSA: false
76 isSSA: false
93 isSSA: false
110 isSSA: false
127 isSSA: false
144 isSSA: false
/external/llvm/test/CodeGen/MIR/Generic/
Dregister-info.mir20 # CHECK: isSSA: false
30 # CHECK: isSSA: false
35 isSSA: false
Dframe-info.mir26 isSSA: true
52 isSSA: true
/external/llvm/test/CodeGen/AArch64/GlobalISel/
Darm64-regbankselect.mir63 isSSA: true
80 isSSA: true
97 isSSA: true
117 isSSA: true
143 isSSA: true
164 isSSA: true
201 isSSA: true
222 isSSA: true
242 isSSA: true
288 isSSA: true
/external/llvm/test/CodeGen/AMDGPU/
Ddetect-dead-lanes.mir29 isSSA: true
87 isSSA: true
166 isSSA: true
224 isSSA: true
245 isSSA: true
266 isSSA: true
293 isSSA: true
347 isSSA: true
399 isSSA: true
Dindirect-addressing-undef.mir67 isSSA: false
123 isSSA: false
178 isSSA: false
235 isSSA: false
291 isSSA: false
/external/llvm/test/CodeGen/MIR/AArch64/
Dgeneric-virtual-registers-error.mir17 isSSA: true
32 isSSA: true
/external/llvm/test/CodeGen/MIR/Lanai/
Dpeephole-compare.mir180 isSSA: true
228 isSSA: true
274 isSSA: true
324 isSSA: true
374 isSSA: true
424 isSSA: true
474 isSSA: true
524 isSSA: true
638 isSSA: true
/external/llvm/test/CodeGen/MIR/X86/
Dvirtual-registers.mir34 isSSA: true
68 isSSA: true
Dinstructions-debug-location.mir53 isSSA: true
75 isSSA: true
Dvirtual-register-redefinition-error.mir13 isSSA: true
Dgeneric-instr-type-error.mir7 isSSA: true
Dexpected-named-register-in-functions-livein.mir13 isSSA: true
Dexpected-virtual-register-in-functions-livein.mir13 isSSA: true
Dstandalone-register-error.mir10 isSSA: true
Dexpected-subregister-after-colon.mir13 isSSA: true
Dundefined-register-class.mir15 isSSA: true
Dunknown-subregister-index-op.mir15 isSSA: true
Dundefined-virtual-register.mir15 isSSA: true
Dsubregister-operands.mir15 isSSA: true
Dunknown-subregister-index.mir15 isSSA: true
Dundefined-stack-object.mir15 isSSA: true
Dsubregister-index-operands.mir19 isSSA: true
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dmlicm-stack-write-check.mir31 %0 = COPY $x0 ; Force isSSA = false.
/external/llvm/test/CodeGen/AArch64/
Dmovimm-wzr.mir20 isSSA: false

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