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1# RUN: llc -march=x86-64 -start-after machine-sink -stop-after machine-sink -o - %s | FileCheck %s
2# This test ensures that the MIR parser parses virtual register definitions and
3# references correctly.
4
5--- |
6
7  define i32 @bar(i32 %a) {
8  entry:
9    %0 = icmp sle i32 %a, 10
10    br i1 %0, label %less, label %exit
11
12  less:
13    ret i32 0
14
15  exit:
16    ret i32 %a
17  }
18
19  define i32 @foo(i32 %a) {
20  entry:
21    %0 = icmp sle i32 %a, 10
22    br i1 %0, label %less, label %exit
23
24  less:
25    ret i32 0
26
27  exit:
28    ret i32 %a
29  }
30
31...
32---
33name:            bar
34isSSA:           true
35tracksRegLiveness: true
36# CHECK:      registers:
37# CHECK-NEXT:   - { id: 0, class: gr32 }
38# CHECK-NEXT:   - { id: 1, class: gr32 }
39# CHECK-NEXT:   - { id: 2, class: gr32 }
40registers:
41  - { id: 0, class: gr32 }
42  - { id: 1, class: gr32 }
43  - { id: 2, class: gr32 }
44body: |
45  bb.0.entry:
46    successors: %bb.2.exit, %bb.1.less
47    liveins: %edi
48    ; CHECK:      %0 = COPY %edi
49    ; CHECK-NEXT: %1 = SUB32ri8 %0, 10
50    %0 = COPY %edi
51    %1 = SUB32ri8 %0, 10, implicit-def %eflags
52    JG_1 %bb.2.exit, implicit %eflags
53    JMP_1 %bb.1.less
54
55  bb.1.less:
56    ; CHECK:      %2 = MOV32r0
57    ; CHECK-NEXT: %eax = COPY %2
58    %2 = MOV32r0 implicit-def %eflags
59    %eax = COPY %2
60    RETQ %eax
61
62  bb.2.exit:
63    %eax = COPY %0
64    RETQ %eax
65...
66---
67name:            foo
68isSSA:           true
69tracksRegLiveness: true
70# CHECK: name: foo
71# CHECK:      registers:
72# CHECK-NEXT:   - { id: 0, class: gr32 }
73# CHECK-NEXT:   - { id: 1, class: gr32 }
74# CHECK-NEXT:   - { id: 2, class: gr32 }
75registers:
76  - { id: 2, class: gr32 }
77  - { id: 0, class: gr32 }
78  - { id: 10, class: gr32 }
79body: |
80  bb.0.entry:
81    successors: %bb.2.exit, %bb.1.less
82    liveins: %edi
83    ; CHECK:      %0 = COPY %edi
84    ; CHECK-NEXT: %1 = SUB32ri8 %0, 10
85    %2 = COPY %edi
86    %0 = SUB32ri8 %2, 10, implicit-def %eflags
87    JG_1 %bb.2.exit, implicit %eflags
88    JMP_1 %bb.1.less
89
90  bb.1.less:
91    ; CHECK:      %2 = MOV32r0
92    ; CHECK-NEXT: %eax = COPY %2
93    %10 = MOV32r0 implicit-def %eflags
94    %eax = COPY %10
95    RETQ %eax
96
97  bb.2.exit:
98    ; CHECK: %eax = COPY %0
99    %eax = COPY %2
100    RETQ %eax
101...
102