/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | CodeGenDAGPatterns.cpp | 850 if (isUnindexed()) in getPredCode() 866 if (!isUnindexed() && !isNonExtLoad() && !isAnyExtLoad() && in getPredCode() 887 if (!isUnindexed() && !isTruncStore() && !isNonTruncStore() && in getPredCode() 983 if (isUnindexed()) in getPredCode() 1076 bool TreePredicateFn::isUnindexed() const { in isUnindexed() function in TreePredicateFn 1187 if (isUnindexed()) in getCodeToRunOnSDNode()
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D | CodeGenDAGPatterns.h | 515 bool isUnindexed() const;
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D | GlobalISelEmitter.cpp | 213 if (P.isUnindexed()) in explainPredicates() 305 if (Predicate.isUnindexed()) in isTrivialOperatorNode() 3256 if (Predicate.isUnindexed()) in createAndImportSelDAGMatcher()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 186 assert(N->isUnindexed() && "Indexed vector load?"); in ScalarizeVecRes_LOAD() 375 assert(N->isUnindexed() && "Indexed store of one-element vector?"); in ScalarizeVecOp_STORE() 1103 assert(N->isUnindexed() && "Indexed store of vector?"); in SplitVecOp_STORE()
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D | DAGCombiner.cpp | 2427 LN0->isUnindexed() && N0.hasOneUse() && LN0->hasOneUse()) { in visitAND() 6201 if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) { in visitLOAD() 6577 ST->isUnindexed()) { in visitSTORE() 6591 if (Value.getOpcode() == ISD::UNDEF && ST->isUnindexed()) in visitSTORE() 6664 if (OptLevel != CodeGenOpt::None && ST->isUnindexed()) { in visitSTORE() 6717 if (ST->isTruncatingStore() && ST->isUnindexed() && in visitSTORE() 6747 ST->isUnindexed() && !ST->isVolatile() && in visitSTORE() 6759 && Value.getNode()->hasOneUse() && ST->isUnindexed() && in visitSTORE()
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D | TargetLowering.cpp | 2027 if (!Lod->isVolatile() && Lod->isUnindexed()) { in SimplifySetCC()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 3241 LN0->isUnindexed() && N0.hasOneUse() && SDValue(LN0, 0).hasOneUse()) { in visitAND() 6142 if (LN0->getExtensionType() != ISD::ZEXTLOAD && LN0->isUnindexed()) { in visitSIGN_EXTEND() 6434 if (LN0->getExtensionType() != ISD::SEXTLOAD && LN0->isUnindexed()) { in visitZERO_EXTEND() 10108 if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) { in visitLOAD() 10131 if (UseAA && LD->isUnindexed()) { in visitLOAD() 12022 ST->isUnindexed()) { in visitSTORE() 12041 if (Value.isUndef() && ST->isUnindexed()) in visitSTORE() 12045 if (OptLevel != CodeGenOpt::None && ST->isUnindexed()) { in visitSTORE() 12071 if (UseAA && ST->isUnindexed()) { in visitSTORE() 12092 if (ST->isTruncatingStore() && ST->isUnindexed() && in visitSTORE() [all …]
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D | LegalizeVectorTypes.cpp | 224 assert(N->isUnindexed() && "Indexed vector load?"); in ScalarizeVecRes_LOAD() 533 assert(N->isUnindexed() && "Indexed store of one-element vector?"); in ScalarizeVecOp_STORE() 1861 assert(N->isUnindexed() && "Indexed store of vector?"); in SplitVecOp_STORE()
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D | TargetLowering.cpp | 1522 if (!Lod->isVolatile() && Lod->isUnindexed()) { in SimplifySetCC()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 1587 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | DAGCombiner.cpp | 8447 LN00->getExtensionType() != ISD::ZEXTLOAD && LN00->isUnindexed()) { in visitSIGN_EXTEND() 8714 LN00->getExtensionType() != ISD::SEXTLOAD && LN00->isUnindexed()) { in visitZERO_EXTEND() 12653 if (OptLevel != CodeGenOpt::None && LD->isUnindexed()) { in visitLOAD() 12667 if (LD->isUnindexed()) { in visitLOAD() 14641 ST->isUnindexed()) { in visitSTORE() 14659 if (Value.isUndef() && ST->isUnindexed()) in visitSTORE() 14663 if (OptLevel != CodeGenOpt::None && ST->isUnindexed()) { in visitSTORE() 14682 if (ST->isUnindexed()) { in visitSTORE() 14694 if (ST->isTruncatingStore() && ST->isUnindexed() && in visitSTORE() 14727 ST->isUnindexed() && !ST->isVolatile() && in visitSTORE() [all …]
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D | LegalizeVectorTypes.cpp | 222 assert(N->isUnindexed() && "Indexed vector load?"); in ScalarizeVecRes_LOAD() 593 assert(N->isUnindexed() && "Indexed store of one-element vector?"); in ScalarizeVecOp_STORE() 2069 assert(N->isUnindexed() && "Indexed store of vector?"); in SplitVecOp_STORE()
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D | TargetLowering.cpp | 2117 if (!Lod->isVolatile() && Lod->isUnindexed()) { in SimplifySetCC()
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/external/llvm/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 1801 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | SelectionDAGNodes.h | 2039 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLoweringHVX.cpp | 1405 assert(BN->isUnindexed()); in SplitHvxMemOp()
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D | HexagonISelLowering.cpp | 2664 if (!LN->isUnindexed()) in LowerUnalignedLoad()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 8015 assert(LN->isUnindexed() && "Indexed v4i1 loads are not supported"); in LowerVectorLoad() 8104 assert(SN->isUnindexed() && "Indexed v4i1 stores are not supported"); in LowerVectorStore() 10610 if (cast<StoreSDNode>(N)->isUnindexed() && in PerformDAGCombine() 10766 if (LD->isUnindexed() && VT.isVector() && in PerformDAGCombine()
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D | PPCISelDAGToDAG.cpp | 2886 if (LD->isUnindexed() && LD->hasOneUse() && Op1.hasOneUse() && in Select()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 9276 assert(LN->isUnindexed() && "Indexed v4i1 loads are not supported"); in LowerVectorLoad() 9363 assert(SN->isUnindexed() && "Indexed v4i1 stores are not supported"); in LowerVectorStore() 12497 if (cast<StoreSDNode>(N)->isUnindexed() && Opcode == ISD::BSWAP && in PerformDAGCombine() 12686 if (LD->isUnindexed() && VT.isVector() && in PerformDAGCombine()
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D | PPCISelDAGToDAG.cpp | 4680 if (LD->isUnindexed() && LD->hasOneUse() && Op1.hasOneUse() && in Select()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1099 if (LD->isUnindexed()) in tryIndexedLoad()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1042 if (LD->isUnindexed()) in tryIndexedLoad()
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 5282 if (cast<StoreSDNode>(N)->isUnindexed() && in PerformDAGCombine()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 4492 cast<LoadSDNode>(Elems[I])->isUnindexed()) { in buildVector()
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