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Searched refs:kQRegSize (Results 1 – 12 of 12) sorted by relevance

/external/vixl/src/aarch64/
Doperands-aarch64.h152 (size_ == kQRegSize)) && in IsValidVRegister()
366 VRegister V16B() const { return VRegister(code_, kQRegSize, 16); } in V16B()
369 VRegister V8H() const { return VRegister(code_, kQRegSize, 8); } in V8H()
371 VRegister V4S() const { return VRegister(code_, kQRegSize, 4); } in V4S()
372 VRegister V2D() const { return VRegister(code_, kQRegSize, 2); } in V2D()
468 const VRegister q##N(N, kQRegSize); \
469 const VRegister v##N(N, kQRegSize);
Dinstructions-aarch64.h75 const unsigned kQRegSize = 128; variable
77 const unsigned kQRegSizeInBytes = kQRegSize / 8;
Dinstructions-aarch64.cc561 return kQRegSize; in RegisterSizeInBitsFromFormat()
Ddisasm-aarch64.cc5065 reg_size = kQRegSize; in SubstituteRegisterField()
/external/vixl/examples/aarch64/
Dneon-matrix-multiply.cc47 VRegister v_out = VRegister(out_column, kQRegSize, 4); in GenerateMultiplyColumn()
/external/v8/src/arm64/
Dsimulator-arm64.h374 typedef SimRegisterBase<kQRegSize> SimVRegister; // v0-v31
517 for (unsigned i = size; i < kQRegSize; i++) { in ClearForWrite()
638 Saturation saturated_[kQRegSize];
641 bool round_[kQRegSize];
877 uint8_t val[kQRegSize];
885 (sizeof(T) == kQRegSize), in vreg()
949 (sizeof(value) == kQRegSize),
1001 (sizeof(value) == kDRegSize) || (sizeof(value) == kQRegSize)); in set_vreg_no_log()
1266 void PrintVRegisterRawHelper(unsigned code, int bytes = kQRegSize,
Dsimulator-arm64.cc934 case kQRegSize: in GetPrintRegisterFormatForSize()
946 case kQRegSize: in GetPrintRegisterFormatForSize()
1156 int byte = kQRegSize - 1; in PrintVRegisterRawHelper()
1195 DCHECK_LE(msb, static_cast<unsigned>(kQRegSize)); in PrintVRegisterFPHelper()
1209 if (msb < (kQRegSize - 1)) { in PrintVRegisterFPHelper()
1926 DCHECK_EQ(access_size, static_cast<unsigned>(kQRegSize)); in LoadStorePairHelper()
1962 DCHECK_EQ(access_size, static_cast<unsigned>(kQRegSize)); in LoadStorePairHelper()
Dconstants-arm64.h69 const int kQRegSize = kQRegSizeInBits >> 3; variable
Ddisasm-arm64.cc3459 imm *= (instr->NEONQ() == 0) ? kDRegSize : kQRegSize; in SubstituteRegisterField()
Dassembler-arm64.cc2941 DCHECK_LT(lane, kQRegSize / lane_size); in LoadStoreStructSingle()
/external/vixl/test/aarch64/
Dtest-simulator-aarch64.cc1691 VRegister vdstr = VRegister(0, kQRegSize); in Test1OpAcrossNEON_Helper()
2183 VIXL_ASSERT((vm_bits * vm_subvector_count) <= kQRegSize); in TestByElementNEON_Helper()
Dtest-assembler-aarch64.cc27583 VRegister temp = temps.AcquireVRegisterOfSize(kQRegSize); in TEST()